lm26480sqx-bf National Semiconductor Corporation, lm26480sqx-bf Datasheet - Page 15

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lm26480sqx-bf

Manufacturer Part Number
lm26480sqx-bf
Description
Lm26480 Externally Programmable Dual High-current Step-down Dc/dc And Dual Linear Regulators
Manufacturer
National Semiconductor Corporation
Datasheet
CURRENT LIMITING
A current limit feature allows the converter to protect itself and
external components during overload conditions. PWM mode
implements current limiting using an internal comparator that
trips at 2.0A for both bucks (typ). If the output is shorted to
ground the device enters a timed current limit mode where the
NFET is turned on for a longer duration until the inductor cur-
rent falls below a low threshold, ensuring inductor current has
more time to decay, thereby preventing runaway.
PFM OPERATION
At very light loads, the converter enters PFM mode and op-
erates with reduced switching frequency and supply current
to maintain high efficiency.
The part will automatically transition into PFM mode when ei-
ther of two conditions occurs for a duration of 32 or more clock
cycles:
or
level
During PFM operation, the converter positions the output volt-
age slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The PFM
comparators sense the output voltage via the feedback pin
and control the switching of the output FETs such that the
output voltage ramps between 0.8% and 1.6% (typical) above
the nominal PWM output voltage. If the output voltage is be-
low the ‘high’ PFM comparator threshold, the PMOS power
switch is turned on. It remains on until the output voltage ex-
ceeds the ‘high’ PFM threshold or the peak current exceeds
A. The inductor current becomes discontinuous
B. The peak PMOS switch current drops below the I
MODE
15
the I
PFM mode is:
Once the PMOS power switch is turned off, the NMOS power
switch is turned on until the inductor current ramps to zero.
When the NMOS zero-current condition is detected, the
NMOS power switch is turned off. If the output voltage is be-
low the ‘high’ PFM comparator threshold (see following fig-
ure), the PMOS switch is again turned on and the cycle is
repeated until the output reaches the desired level. Once the
output reaches the ‘high’ PFM threshold, the NMOS switch is
turned on briefly to ramp the inductor current to zero and then
both output switches are turned off and the part enters an
extremely low power mode. Quiescent supply current during
this ‘sleep’ mode is less than 30 µA, which allows the part to
achieve high efficiencies under extremely light load condi-
tions. When the output drops below the ‘low’ PFM threshold,
the cycle repeats to restore the output voltage to ~1.6% above
the nominal PWM output voltage.
If the load current should increase during PFM mode (see
figure below) causing the output voltage to fall below the
‘low2’ PFM threshold, the part will automatically transition into
fixed-frequency PWM mode.
SW1, SW2 CONTROL
SW1 and SW2 are enabled/disabled through the external en-
able pins.
The Modulation mode PWM/PFM is by default automatic and
depends on the load as described above in the functional de-
scription. The modulation mode can be factory trimmed, forc-
ing the buck to operate in PWM mode regardless of the load
condition.
PFM
level set for PFM mode. The typical peak current in
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