ncp1601a ON Semiconductor, ncp1601a Datasheet - Page 13

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ncp1601a

Manufacturer Part Number
ncp1601a
Description
Compact Fixed Frequency Discontinuous Or Critical Conduction Voltage Mode Power Factor Correction Controller
Manufacturer
ON Semiconductor
Datasheet

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Figure 33 is studied. When the inductor current is exactly
zero (i.e., I
reached where R
the tolerance, the actual sense resistor R
higher than the ideal value of R
current signal is generated when sense current is smaller
than the ZCD threshold (i.e., I
between the operating and ideal ZCD points in Figure 33.
Hence, R
recommended value of R
R
greater than R
(eq.16) with different inductor currents I
studied.
Figure 34. When the inductor current I
I
the zero current signal is generated.
term is smaller the error or distance between the lines to the
line I
sense resistor R
possible to minimize the error in the zero current detection.
Overcurrent Protection (OCP)
I
is V
L(ZCD)
S(OCP)
S(ZCD)
Based on the CS pin (Pin 4) characteristics in Figure 15,
The higher value of R
Now that the R
These operating lines are added in Figure 33 to formulate
It is noted in Figure 34 and (eq.16) that when the (R
Overcurrent protection is reached when I
V
S(OCP)
S(ZCD)
Figure 34. CS Pin Characteristic with Different
L
ZCD
point
Best
, the sense current I
= 0 is smaller. Therefore, the value of the current
(200 mA typical). The offset voltage of the CS pin
which is 1 kW.
I L(OCP) +
S
L(ZCD)
(3.2 mV typical) in this condition. That is
has to be as low as possible. The best
V
S(ZCD)
R S u R S(ZCD) +
S
I
S(ZCD)
CS
S
= 0), the ideal ZCD point in the Figure is
is R
S
V S + R S * R CS I L
is also recommended to be as small as
Inductor Current
. From (eq.13), the operating lines in
I
is set at a particular value which is
R S I S(OCP) * V S(OCP)
L
S(ZCD)
= 0
S
S
S
I
is lower than I
L
is therefore the maximum of
(536 W typical). Considering
= I
makes the longer distance
S
R CS
L(ZCD)
S(ZCD)
< I
V S(ZCD)
I S(ZCD)
ZCD point
Operating
S(ZCD)
to ensure that zero
S
). That is,
S(ZCD)
L
L
is needed to be
S
I
L
of (eq.13) are
is lower than
is higher than
> I
NCP1601A, NCP1601B
L(ZCD)
and hence
(eq.15)
(eq.16)
(eq.17)
http://onsemi.com
I
S
CS
I
L
)
13
Drive Output of the device goes low.
Oscillator / Synchronization Block
to keep the operation in DCM or CRM only, the Drive
Output cannot turn on as long as there is some inductor
current flowing through the circuit. Hence, the zero current
signal is provided to the oscillator / synchronization block
in Figure 35. An input comparator monitors the Osc pin
(Pin 5) voltage and generates a clock signal. The negative
edge of the clock signal is stored in a RS latch. When zero
current is detected, the RS latch will be reset and a set signal
is sent to the output drive latch which turns on the MOSFET
in the PFC boost circuit. Figure 36 illustrates a typical
timing diagram of the oscillator block.
Oscillator Mode
C
typical), the pin sinks a current I
typical) and the external capacitor C
the voltage reaches V
a current I
C
propagation delay and the 3.5 V and 5 V threshold
conditions are measured on 220 pF C
the actual oscillator hysteresis is a slightly smaller.
Osc
Drive output
(latch set signal)
Clock edge
Osc clock
osc
osc
When overcurrent protection threshold is reached, the
The NCP1601 is a DCM / CRM PFC controller. In order
The Osc pin (Pin 5) is connected to an external capacitor
Osc pin
Figure 37. Oscillator Mode Timing Diagram in DCM
voltage
(DCM)
(latch output)
. When the voltage of this pin is above V
is charged. It is noted that there is a typical 300 ns
5
clock edge
Figure 35. Oscillator / Synchronization Block
clock latch
Figure 36. Oscillator Block Timing Diagram
Discontinuous mode
45 mA
94 mA
inductor
current
clock
och
0
(45 mA typical) and the external capacitor
1
5 V/3.5 V
Oscillator Clock
sync(L)
+
(3.5 V typical), the pin sources
Critical mode
odch
S
R
Zero Current
osc
osc
Q
delay
(94 – 45 = 49 mA
discharges. When
capacitor. Hence,
&
sync(H)
Turn on
MOSFET
3.5 V
5 V
(5 V
time

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