ncp1080 ON Semiconductor, ncp1080 Datasheet - Page 10

• Manufacturer Part Number: ncp1080
• Description: Integrated Poe-pd & Dc-dc Converter Controller
• Manufacturer: ON Semiconductor

IEEE802.3af defined operating modes: detection signature,
current source classification, inrush and operating current
limits. In order to give more flexibility to the user and also
to keep control of the power dissipation in the NCP1080,
both current limits are configurable. The device enters
operation once its programmable Vuvlo_on threshold is
reached, and operation ceases when the supplied voltage
falls below the Vuvlo_off threshold. Sufficient hysteresis
and Uvlo filter time are provided to avoid false power on/off
cycles due to transient voltage drops on the cable.
resistance seen by the PSE through the cable must be in the
IEEE802.3af standard specification range (23.75 kW to
26.25 kW) for a PSE voltage from 2.7 V to 10.1 V. In order
to compensate for the non−linear effect of the diode bridge
and satisfy the specification at low PSE voltage, the
NCP1080 presents a suitable impedance in parallel with the
25.5 kW Rdet external resistor. For some types of diodes
(especially Schottky diodes), it may be necessary to adjust
this external resistor.
11.5 V) on VPORTP, the NCP1080 turns on its internal
3.3 V regulator and biasing circuitry in anticipation of the
classification phase as the next step.
classification process begins. In classification, the PD
regulates a constant current source that is set by the external
resistor RCLASS value on the CLASS pin. Figure 6 shows
the schematic overview of the classification block. The
current source is defined as:
Powered Device Interface
Detection
Classification
The PD interface portion of the NCP1080 supports the
During the detection phase, the incremental equivalent
When the Detection_Off level is detected (typically
Once the PSE device has detected the PD device, the
Rclass
VPORTN1,2
VPORTP
CLASS
Figure 6. Classification Block Diagram
I
class
+
R
V
class
bg
, (where V
VDDA1
bg
NCP1080
is 1.2 V)
1.2 V
Description of Operation
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10
Power Mode
PSE and PD devices move into the operating mode.
Under Voltage Lock Out (UVLO)
(UVLO) circuit which monitors the input voltage and
determines when to apply power to the DC−DC controller.
UVLO must be connected to VPORTN
signature resistor has to be placed directly between
VPORTP and VPORTN
must be connected to the center of an external resistor
divider between VPORTP and VPORTN
Figure 8. The series resistance value of the external
resistors must add to 25.5 kW and replaces the internal
signature resistor.
R2 can be calculated using the following equations:
When the classification hand−shake is completed, the
The NCP1080 incorporates an under voltage lock out
To use the default settings for UVLO (see Table 3), the pin
To define the UVLO threshold externally, the UVLO pin
For a Vuvlo_on desired turn−on voltage threshold, R1 and
VPORT
VPORT
Figure 8. External UVLO Configuration
Figure 7. Default UVLO Settings
R1
R2
Rdet
R1 ) R2 + R
R2 +
1,2
V
ulvo_on
, as shown in Figure 7.
1.2
UVLO
VPORTN1,2
VPORTP
det
UVLO
VPORTP
VPORTN1,2
R
NCP1080
det
NCP1080
1,2
. In this case the
1,2
as shown in