ncp1282 ON Semiconductor, ncp1282 Datasheet - Page 17
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ncp1282
Manufacturer Part Number
ncp1282
Description
High-performance Active Clamp/reset Pwm Controller Featuring Hv Start-up
Manufacturer
ON Semiconductor
Datasheet
1.NCP1282.pdf
(22 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ncp1282BDR2G
Manufacturer:
ON/安森美
Quantity:
20 000
V
an independent 12 V supply. If operating from an
independent supply, the V
connected together. The independent supply should
maintain V
Latch will not be SET and the outputs will remain OFF after
a fault condition is removed.
is recommended to place a diode between C
auxiliary supply as shown in Figure 41. This allows the
NCP1282 to charge C
regulator from sourcing current into the auxiliary supply.
in the self-bias or DSS mode. During the converter
powerup, C
greater than V
supply voltage is building up. Otherwise, V
collapse and the controller will turn OFF. Also, the V
discharge time (from 11.0 V to 9.5 V) must be greater that
the soft-start charge period to assure the converter turns
ON. The IC bias current, gate charge load on the outputs,
AUX(on)
The startup regulator is disabled by biasing V
The startup circuit sources current into the V
C
AUX
V
Figure 41. Recommended V
in
provides power to the controller while operating
. This feature allows the NCP1282 to operate from
AUX
AUX
Disable
V
AUX(off2)
V
I
AUX(off1)
start
AUX(on)
above V
V
must be sized such that a V
V
V
V
UVOV
V
V
inhibit
SS
AUX
REF
out1
AUX
is maintained while the auxiliary
AUX(on)
V
in
I
AUX
AUX
while preventing the startup
and V
. Otherwise, the Output
AUX
AUX
C
Auxiliary Supply or
Independent Supply
Configuration
AUX
pins should be
Figure 40. Startup Circuit Waveforms
I
supply
AUX
AUX
AUX
AUX
AUX
and the
voltage
http://onsemi.com
above
pin. It
AUX
will
NCP1282
17
and the 5.0 V reference load must be considered to
correctly size C
external gate charge is calculated using Equation 1.
where, f is the operating frequency and Q
prevents excessive power dissipation if the V
accidentally shorted. While V
startup circuit is disabled and a current source (I
charges V
V
Therefore it is imperative that V
resistor divider, etc.) with more than 50 mA while V
below 1.2 V. Otherwise, V
greater than 50 mA is present, a resistor can be placed
between the V
1.2 V.
500 V. If the device operates in the DSS mode, power
dissipation should be controlled to avoid exceeding the
maximum power dissipation of the controller. If dissipation
on the controller is excessive, a resistor can be placed in
series with the V
on the controller and transfer it to the series resistor.
Line Under/Overvoltage Detector
overvoltage (OV) detection using a novel architecture
(patent pending). This architecture allows both the UV and
OV levels to be set independently. Both the UV and OV
detectors have a 100 mV hysteresis.
AUX
An internal supervisory circuit monitors V
The startup circuit is rated at a maximum voltage of
The same pin is used for both line undervoltage (UV) and
reaches 1.2 V the startup circuit is enabled.
AUX
I AUX(gate charge) + f @ Q G
in
with a minimum current of 50 mA. Once
in
AUX
and V
pin. This will reduce power dissipation
. The current consumption due to
AUX
AUX
pins to help charge V
AUX
will not charge. If a load
AUX
is below 1.2 V, the
is not loaded (driver,
G
is the gate charge.
AUX
AUX
AUX
(eq. 1)
AUX
inhibit
pin is
and
to
is
)