ncp1232dr2 ON Semiconductor, ncp1232dr2 Datasheet
ncp1232dr2
Available stocks
Related parts for ncp1232dr2
ncp1232dr2 Summary of contents
Page 1
... Year WW = Work Week X = Assembly ID Code Z = Subcontractor ID Code PIN CONNECTIONS 8–Pin SOIC PB RST TOL 3 GND 4 (Top View) ORDERING INFORMATION Device Package NCP1232DR2 SO–8 1 Publication Order Number: MARKING DIAGRAM 8 NCP 1232 YWWXZ RST 6 RST 5 Shipping 2500 Tape & Reel ...
Page 2
VD CC 5%/10% TOLERANCE TOL SELECT REF PB RST DEBOUNCE TD WATCHDOG TIMEBASE SELECT Pin No. (8–Pin SOIC) Symbol 1 PB RST Push–button Reset Input. A debounced active–low input that ignores pulses less than 1 msec in duration and is ...
Page 3
ABSOLUTE MAXIMUM RATINGS* Voltage on any pin (with respect to GND) –0 +5.8 V Rating Operating Temperature Range Storage Temperature Range, T stg Lead Temperature (Soldering, 10 sec) *Stresses beyond those listed under “Absolute Maximum Ratings’’ may cause ...
Page 4
Power Monitor The NCP1232 detects out–of–tolerance power supply conditions and warns a processor–based system of an impending power failure. When detected as below the preset level defined by TOL, the V CC comparator outputs the signals RST ...
Page 5
NCP1232 PBD PB RST V IL RST RST Figure 3. Push–button Reset. The debounced PB RST input ignores input pulses less than 1 msec and is guaranteed to recognized pulses of 20 msec or greater PUSH–BUTTON RESET ...
Page 6
+4.75 V +4.25 V Figure 5. Power–Down Slew Rate +4.5 V (5% TRIP POINT) +4.25 V (10% TRIP POINT) RST V OH RST SLEW RATE = ...
Page 7
PACKAGE DIMENSIONS 0. SEATING PLANE 0. 0. NCP1232 SO–8 D SUFFIX CASE 751–06 ISSUE T NOTES: 1. ...
Page 8
... CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit– ...