ncp1239f ON Semiconductor, ncp1239f Datasheet - Page 31

• Manufacturer Part Number: ncp1239f
• Description: Lowstandby High Performance Pwm Controller
• Manufacturer: ON Semiconductor

Soft−Start
during the Power On sequence (PON). As soon as V
reaches 16.4 V, the current setpoint is gradually increased
from nearly zero up to the maximum clamping level (e.g.
0.9 V/Rsense). This situation lasts a programmable time that
is adjusted by the Pin 6 capacitor (7.5 ms typically with
C
setpoint is blocked to 0.9 V/Rsense until the supply enters
Internal Ramp Compensation
sub−harmonic oscillations. These oscillations take place at
half the switching frequency and occur only during
Continuous Conduction Mode (CCM) with a duty−cycle
greater than 50%. To lower the current loop gain, one usually
injects between 50 and 100% of the inductor down−slope.
Figure 52 depicts how internally the ramp is generated:
pin6
The NCP1239 features an internal soft−start activated
Ramp compensation is a known mean to cure
= 390 nF). Further to that time period, the current
6.9V
Soft−start is activated during a startup sequence or an OVL condition
http://onsemi.com
Figure 51.
CC
NCP1239
16.4V
31
regulation. The soft−start is also activated at each start of the
active phase of fault burst operation. Every restart attempt
is followed by a soft−start activation.
V
or 6.9 V, the latch−off threshold after an overload detection
(OVL) for instance. Figure 51 shows the soft−start behavior.
The time scales are purposely shifted to offer a better zoom
portion.
CC
Generally speaking, the soft−start will be activated when
ramps up either from zero (fresh power−on sequence)
Inserting a resistor in series with the current sense
+
−
from
setpoint
information brings ramp compensation
LEB
Figure 52.
32k
CS
Rramp
3.2V
0V
Rsense