viper50b STMicroelectronics, viper50b Datasheet - Page 14

• Manufacturer Part Number: viper50b
• Description: Smps Primary I.c.
• Manufacturer: STMicroelectronics

VIPER50B/BSP
used. It mixes a high performance compensation
network together with a separate high value soft
start capacitor. Both soft start time and regulation
loop bandwidth can be adjusted separately.
If the device is intentionally shut down by putting
the COMP pin to ground, the device is also
performing start-up cycles, and the V
oscillating between V
can be used for supplying external functions,
provided that their consumption doesn’t exceed
0.5mA. Figure 17 shows a typical application of
this function, with a latched shut down. Once the
”Shutdown” signal has been activated, the device
remains in the off state until the input voltage is
removed.
TRANSCONDUCTANCE ERROR AMPLIFIER
The VIPer50B/BSP includes a transconductance
error amplifier. Transconductance Gm is the
change in output current (I
in input voltage (V
G
The output impedance Z
amplifier (COMP pin) can be defined as:
Z
This last equation shows that the open loop gain
A
A
where G
typically.
14/20
Figure 16: Mixed Soft Start and Compensation
ACIN
COMP
VOL
VOL
m
can be related to G
= G
F1
R9
I
COMP
V
m
m
C1
DD
R2
C5
V
I
x Z
value for VIPer50B/BSP is 1.5 mA/V
COMP
TR2
COMP
COMP
OSC
13V
VDD
DD
BR1
-
+
G
). Thus:
C2
1
C4
DDon
C11
m
D3
COMP SOURCE
x
COMP
m
D1
R7
R1
R3
C6
DRAIN
and V
C3
and Z
V
COMP
V
COMP
VIPer50B
at the output of this
DD
TR1
DDoff
COMP
) versus change
U2
ISO1
D2
C7
R6
C10
. This voltage
C8
DD
:
R4
R5
voltage is
L2
C9
+Vcc
GND
FC00311
G
and therefore A
tolerances. An impedance Z can be connected
between the COMP pin and ground in order to
define more accurately the transfer function F of
the error amplifier, according to the following
equation, very similar to the one above:
F
The error amplifier frequency response is
reported in figure 10 for different values of a
simple resistance connected on the COMP pin.
The unloaded transconductance error amplifier
shows an internal Z
complex impedance can be connected on the
COMP pin to achieve different compensation
laws. A capacitor will provide an integrator
function, thus eliminating the DC static error, and
a resistance in series leads to a flat gain at higher
frequency, insuring a correct phase margin. This
configuration is illustrated on figure 18.
As shown in figure 18 an additional noise filtering
capacitor of 2.2 nF is generally needed to avoid
any high frequency interference.
It can be also interesting to implement a slope
compensation when working in continuous mode
with duty cycle higher than 50%. Figure 19 shows
such a configuration. Note that R1 and C2 build
the classical compensation network, and Q1 is
injecting the slope compensation with the correct
polarity from the oscillator sawtooth.
EXTERNAL CLOCK SYNCHRONIZATION:
The
capability, when connected to an external
Figure 17: Latched Shut Down
(S)
m
Shutdown
is well defined by specification, but Z
= Gm x Z(S)
OSC
R4
pin
Q 2
R3
VOL
provides a
COMP
Q1
R 1
R 2
are subject to
of about 330 K . More
OSC
13V
VD D
D1
synchronisation
+
-
VIPer50B
FC00341
COMP
SOURCE
DR AIN
COMP
large