viper20b STMicroelectronics, viper20b Datasheet - Page 13

• Manufacturer Part Number: viper20b
• Description: Smps Primary I.c.
• Manufacturer: STMicroelectronics

network together with a separate high value soft
start capacitor. Both soft start time and regulation
loop bandwidth can be adjusted separately.
If the device is intentionally shut down by putting
the COMP pin to ground, the device is also
performing start-up cycles, and the V
oscillating between V
can be used for supplying external functions,
provided that their consumption doesn’t exceed
0.5mA. Figure 14 shows a typical application of
this function, with a latched shut down. Once the
”Shutdown” signal has been activated, the device
remains in the off state until the input voltage is
removed.
TRANSCONDUCTANCE ERROR AMPLIFIER
The VIPer30B includes a transconductance error
amplifier. Transconductance Gm is the change in
output current (I
voltage (V
G
The output impedance Z
amplifier (COMP pin) can be defined as:
Z
This last equation shows that the open loop gain
A
A
where G
typically.
G
Figure 13: Mixed Soft Start and Compensation
COMP
VOL
VOL
m
m
+ C3
is well defined by specification, but Z
can be related to G
= G
OSC
I
COMP
V
m
m
13V
DD
DD
VDD
V
I
x Z
COMP
COMP
). Thus:
value for VIPer20B is 1.5 mA/V
C4
+
-
COMP
VIPer
COMP SO URCE
COMP
C1
G
1
DDon
R1
m
DRAIN
) versus change in input
x
COMP
m
and V
and Z
V
D1
V
COMP
at the output of this
DD
+ C2
DDoff
COMP
FC0 0 43 2
R3
R2
. This voltage
D2
D3
DD
:
voltage is
AUXILI ARY
WINDING
COMP
and
tolerances. An impedance Z can be connected
between the COMP pin and ground in order to
define more accurately the transfer function F of
the error amplifier, according to the following
equation, very similar to the one above:
F
The error amplifier frequency response is
reported in figure 8 for different values of a simple
resistance connected on the COMP pin. The
unloaded transconductance error amplifier shows
an internal Z
complex impedance can be connected on the
COMP pin to achieve different compensation
laws. A capacitor will provide an integrator
function, thus eliminating the DC static error, and
a resistance in series leads to a flat gain at higher
frequency, insuring a correct phase margin. This
configuration is illustrated on figure 15.
As shown in figure 15 an additional noise filtering
capacitor of 2.2 nF is generally needed to avoid
any high frequency interference.
It can be also interesting to implement a slope
compensation when working in continuous mode
with duty cycle higher than 50%. Figure 16 shows
such a configuration. Note that R1 and C2 build
the classical compensation network, and Q1 is
injecting the slope compensation with the correct
polarity from the oscillator sawtooth.
EXTERNAL CLOCK SYNCHRONIZATION:
The
capability, when connected to an external
frequency source. Figure 17 shows one possible
Figure 14: Latched Shut Down
(S)
Shutdown
= Gm x Z(S)
therefore A
OSC
R 4
pin
Q 2
COMP
R 3
VOL
provides a
VIPer20B / VIPer20BSP
of about 330 K . More
Q1
R 1
R2
are subject to
OSC
13V
VDD
D1
synchronisation
+
-
VIPer
FC00442
COMP SOURCE
DRAIN
large
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