at17f16a ATMEL Corporation, at17f16a Datasheet - Page 4

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at17f16a

Manufacturer Part Number
at17f16a
Description
Eeprom Serial-2wire 16m-bit 16m X 1 3.3v 8-pin Lap
Manufacturer
ATMEL Corporation
Datasheet

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5. Pin Description
5.1
5.2
5.3
4
DATA
DCLK
PAGE_EN
AT17F16A
(1)
(1)
(2)
Table 5-1.
Three-state DATA output for FPGA configuration. Open-collector bi-directional pin for configura-
tion programming.
Three-state clock. Functions as an input when the Configurator is in programming mode (i.e.,
SER_EN is Low) and as an output during FPGA configuration.
Input used to enable page download mode. When PAGE_EN is high the configuration download
address space is partitioned into 4 equal pages. This gives users the ability to easily store and
retrieve multiple configuration bitstreams from a single configuration device. This input works in
conjunction with the PAGESEL inputs. PAGE_EN must remain low if paging is not desired.
When SER_EN is Low (ISP mode) this pin has no effect.
Notes:
Name
DATA
DCLK
PAGE_EN
PAGESEL0
PAGESEL1
RESET/
nCS
GND
nCASC
A2
READY
SER_EN
V
CC
1. This pin has an internal 20 kΩ pull-up resistor.
2. This pin has an internal 30 kΩ pull-down resistor.
OE
Pin Description
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
LAP
8
1
2
3
4
5
6
7
8
AT17F16A
PLCC
3474E–CNFG–2/08
20
16
11
10
12
15
18
20
2
4
7
8
9

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