x20c04 Intersil Corporation, x20c04 Datasheet - Page 2

• Manufacturer Part Number: x20c04
• Description: Nonvolatile Static Ram
• Manufacturer: Intersil Corporation

X20C04
PIN DESCRIPTIONS
Addresses (A
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read and recall operations. Output
Enable LOW disables a store operation regardless of
the state of CE, WE, or NE.
Data In/Data Out (I/O
Data is written to or read from the X20C04 through the
I/O pins. The I/O pins are placed in the high impedance
state when either CE or OE is HIGH or when NE is LOW.
FUNCTIONAL DIAGRAM
0
A 7 –A 8
A 3 –A 6
A 0 –A 2
–A
WE
OE
CE
NE
8
)
0
–I/O
7
)
CONTROL
LOGIC
SELECT
ROW
2
Write Enable (WE)
The Write Enable input controls the writing of data to
both the static RAM and stores to the E
Nonvolatile Enable (NE)
The Nonvolatile Enable input controls all accesses to
the E
PIN NAMES
V CC SENSE
A
I/O
WE
CE
OE
NE
V
V
NC
Symbol
2
0
CC
SS
PROM array (store and recall functions).
–A
0
–I/O
8
7
COLUMN
I/O 0 –I/O 7
SELECT
512 x 8
ARRAY
SRAM
I/OS
&
EEPROM ARRAY
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
Nonvolatile Enable
+5V
Ground
No Connect
Description
2
PROM.
3825 FHD F01
3825 PGM T01