74ABT574CSCX Fairchild Semiconductor, 74ABT574CSCX Datasheet - Page 5

• Manufacturer Part Number: 74ABT574CSCX
• Description: IC FLIP FLOP OCT D 3ST 20SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74ABTr
• Type: D-Type Busr

Specifications of 74ABT574CSCX

• Function: Standard
• Output Type: Tri-State Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 200MHz
• Delay Time - Propagation: 3.2ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(Note 14)
(Note 14)
(Note 15)
(Note 14)
(Note 16)
t
t
t
t
t
t
t
t
t
t
t
C
C
Extended AC Electrical Characteristics
PLH
PHL
PZH
PZL
PHZ
PLZ
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE Delay Times are dominated by the RC network (500
Skew
OSHL
OSLH
PS
OST
PV
Note 12: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 13: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
to-LOW (t
Note 15: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 16: Propagation delay variation for a given set of conditions (i.e., temperature and V
tested.
Capacitance
Note 17: C
(SOIC Package)
(SOIC package)
IN
OUT
Symbol
Symbol
Symbol
(Note 17)
OST
OUT
(Note 12)
). This specification is guaranteed but not tested.
is measured at frequency f
Propagation Delay
CP to O
Output Enable Time
Output Disable Time
Pin to Pin Skew
HL Transitions
Pin to Pin Skew
LH Transitions
Duty Cycle
LH–HL Skew
Pin to Pin Skew
LH/HL Transitions
Device to Device Skew
LH/HL Transitions
Input Capacitance
Output Capacitance
n
Parameter
Parameter
Parameter
1 MHz, per MIL-STD-883, Method 3012.
8 Outputs Switching
T
V
A
Min
CC
1.5
1.5
1.5
1.5
1.0
1.0
OSHL
C

(Note 8)
40
L
4.5V to 5.5V
), LOW-to-HIGH (t
q
C to
50 pF
8 Outputs Switching
T
:
A
V
, 250 pF) on the output and has been excluded from the datasheet.
5
CC

Max
Typ
5.0
9.0
5.7
5.7
6.2
6.2
5.5
5.5
85
C

(Note 12)
40
L
q
C
Max
4.5V–5.5V
q
1.0
1.0
1.8
2.0
2.5
C to
50 pF
CC
T
OSLH

V
A
85
) from device to device. This specification is guaranteed but not
CC
Min
2.0
2.0
2.0
2.0
C
q
), or any combination switching LOW-to-HIGH and/or HIGH-

C
L
(Note 11)
40
(Note 9)
4.5V to 5.5V
Units
q
pF
pF
250 pF
C to

Max
7.8
7.8
8.0
8.0
85
8 Outputs Switching
q
T
C
A
V
V
V
CC
CC
CC
C

(Note 13)
L
40
8 Outputs Switching
T
V
Max
A
4.5V–5.5V
0V
5.0V
q
1.8
1.8
4.3
4.3
4.6
Min
250 pF
CC
2.0
2.0
2.0
2.0
C to
C

(Note 10)
(Note 11)
L
40
4.5V to 5.5V

q
85
250 pF
C to
Conditions
T
q
www.fairchildsemi.com
C
A
Max
10.0
10.0
10.5
10.5

85
25
q
q
C
C
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns