is45s32400b Integrated Silicon Solution, Inc., is45s32400b Datasheet
is45s32400b
Manufacturer Part Number
is45s32400b
Description
4meg X 32 128-mbit Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS45S32400B.pdf
(60 pages)
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IS45S32400B
4Meg x 32
128-MBIT SYNCHRONOUS DRAM
FEATURES
• Clock frequency: 166, 143, 125, 100 MHz
• Fully synchronous; all signals referenced to a
• Internal bank for hiding row access/precharge
• Power supply
• LVTTL interface
• Programmable burst length
• Programmable burst sequence:
• Auto Refresh (CBR)
• Self Refresh with programmable refresh periods
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
• Burst termination by burst stop and precharge
• Automotive Temperature Range
• Available in 86-pin TSOP-II and 90-ball FBGA
• Available in Lead-free
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. B
07/10/06
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any
time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
positive clock edge
IS45S32400B
– (1, 2, 4, 8, full page)
Sequential/Interleave
operations capability
command
Option A: 0
Option A1: -40
o
C to +70
o
C to +85
V
3.3V 3.3V
o
DD
C
o
C
V
DDQ
1-800-379-4774
KEY TIMING PARAMETERS
OVERVIEW
ISSI
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock
input.The 128Mb SDRAM is organized in 1Meg x 32 bit x 4
Banks.
Parameter
Clk Cycle Time
Clk Frequency
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
's 128Mb Synchronous DRAM achieves high-speed
166
125
5.4
6.5
-6
6
8
JULY 2006
ISSI
143
100
5.4
6.5
-7
10
7
Unit
Mhz
Mhz
ns
ns
ns
ns
®
1
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