s-24c32c Seiko Instruments Inc., s-24c32c Datasheet - Page 18

• Manufacturer Part Number: s-24c32c
• Description: 2-wire Serial Eeprom S-24c32c/64c 32k/64k-bit
• Manufacturer: Seiko Instruments Inc.

18
LINE
SDA
2-WIRE CMOS SERIAL E
S-24C32C/64C
S
A
R
T
T
7. 2 Random Read
M
S
B
1 0 1 0
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the S-24C32C/64C receives a 7-bit device address and a 1-bit read / write instruction code set to “0”
following a start condition, it responds with an acknowledge.
The S-24C32C/64C then receives a upper 8-bit word address and responds with an acknowledge. And the S-
24C32C/64C receives a lower 8-bit word address and responds with an acknowledge. The memory address is
loaded to the address counter in the S-24C32C/64C by these operations. Reception of write data does not
follow in a dummy write whereas reception of write data follows in byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing
the same operation in the current address read.
That is, when the S-24C32C/64C receives a 7-bit device address and a 1-bit read / write instruction code set to
“1”, following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the
S-24C32C/64C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge,
the reading of S-24C32C/64C is ended.
Remark W12 is arbitrary in the S-24C32C.
ADDRESS
DEVICE
A2 A1 A0
S
B
L
W
W
R
R
E
T
0
/
I
C
A
K
X
X
DUMMY WRITE
WORD ADDRESS
X X W12
2
PROM
UPPER
W11 W10
W9W8
Figure 19 Random Read
Seiko Instruments Inc.
A
C
K
W7 W6 W5 W4 W3 W2 W1
WORD ADDRESS
LOWER
W0
A
C
K
S
T
A
R
T
M
S
B
1 0 1 0
ADDRESS
DEVICE
A2 A1 A0
S
B
L
W
R
R
E
A
D
1
/
C
A
K
D7 D6 D5 D4 D3 D2 D1 D0
Rev.2.0
下図へ続く
NO ACK from
Master Device
DATA
_00_H
O
S
T
P