at45db321c ATMEL Corporation, at45db321c Datasheet - Page 25
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at45db321c
Manufacturer Part Number
at45db321c
Description
32-megabit 2.7 Volt Dataflash At45db321c For New Designs Use At45db321d
Manufacturer
ATMEL Corporation
Datasheet
1.AT45DB321C.pdf
(40 pages)
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13.5
Note:
13.6
Notes:
3387M–DFLASH–2/08
RESET
SCK
SO
CS
SI
Reset Timing
The CS signal should be in the high state before the RESET signal is deasserted.
Command Sequence for Read/Write Operations (except Status Register Read)
1. “r” designates bits reserved for larger densities.
2. It is recommended that “r” be a logical “0” for densities of 32M bits or smaller.
3. For densities larger than 32M bits, the “r” bit becomes the most significant Page Address bit for the appropriate density.
MSB
larger densities
HIGH IMPEDANCE
Reserved for
SI
r X X X X X X X
Page Address
(PA12-PA0)
CMD
X X X X X X X X
8 bits
8 bits
(BA9-BA0/BFA9-BFA0)
Byte/Buffer Address
X X X X X X X X
8 bits
t
RST
t
REC
HIGH IMPEDANCE
AT45DB321C
LSB
t
CSS
25