74LVTH273SJ Fairchild Semiconductor, 74LVTH273SJ Datasheet - Page 2

• Manufacturer Part Number: 74LVTH273SJ
• Description: IC FLIP FLOP OCT D LV 20SOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LVTHr
• Type: D-Type Busr

Specifications of 74LVTH273SJ

• Function: Master Reset
• Output Type: Non-Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 150MHz
• Delay Time - Propagation: 4.9ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1999 Fairchild Semiconductor Corporation
74LVTH273 Rev. 1.6.0
Connection Diagram
Pin Description
Functional Description
The LVTH273 consists of eight positive-edge-triggered
flip-flops with individual D-type inputs. The buffered
Clock and Clear are common to all flip-flops. The eight
flip-flops will store the state of their individual D-type
inputs that meet the setup and hold time requirements
on the LOW-to-HIGH Clock (CP) transition. When the
Clock is either HIGH or LOW, the D-input signal has no
effect at the output. When the Clear (CLR) is LOW, all
Outputs will be forced LOW.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
D
CP
CLR
O
0
0
–D
–O
Pin Names
7
7
Data Inputs
Clock Pulse Input
Clear
Outputs
Description
2
Logic Symbols
Truth Table
H
L
X
O
o
LOW Voltage Level
Immaterial
HIGH Voltage Level
D
Previous O
H
X
X
L
LOW-to-HIGH Transition
n
Inputs
H or L
o
CP
before HIGH-to-LOW of CP
X
IEEE/IEC
CLR
H
H
H
L
Outputs
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O
O
H
L
L
n
o