is42s16800e-5tli Integrated Silicon Solution, Inc., is42s16800e-5tli Datasheet - Page 29
is42s16800e-5tli
Manufacturer Part Number
is42s16800e-5tli
Description
16m X 8, 8m X16 128mb Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS42S16800E-5TLI.pdf
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IS42S81600E, IS42S16800E
minus one. This is shown in the READ to PRECHARGE
diagram for each possible CAS latency; data element n +
3 is either the last of a burst of four or the last desired of
a longer burst. Following the PRECHARGE command, a
subsequent command to the same bank cannot be issued
until t
hidden during the access of the last data element(s).
In the case of a fixed-length burst being executed to
completion, a PRECHARGE command issued at the
optimum time (as described above) provides the same
operation that would result from the same fixed-length
burst with auto precharge. The disadvantage of the PRE-
CHARGE command is that it requires that the command
and address buses be available at the appropriate time to
issue the command; the advantage of the PRECHARGE
command is that it can be used to truncate fixed-length
or full-page bursts.
Full-page READ bursts can be truncated with the BURST
TERMINATE command, and fixed-length READ bursts
may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated.The BURST
TERMINATE command should be issued x cycles before
the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
shown in the READ Burst Termination diagram for each
possible CAS latency;data element n + 3 is the last desired
data element of a longer burst.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00C
05/09/08
rp
is met. Note that part of the row precharge time is
29
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