is42s16800a-7tli Integrated Silicon Solution, Inc., is42s16800a-7tli Datasheet - Page 17

• Manufacturer Part Number: is42s16800a-7tli
• Description: 16meg X 8, 8meg X16 & 4meg X 32 128-mbit Synchronous Dram - Integrated Silicon Solution, Inc
• Manufacturer: Integrated Silicon Solution, Inc.

IS42S81600A, IS42S16800A, IS42S32400A
Integrated Silicon Solution, Inc. — www.issi.com —
PRELIMINARY INFORMATION Rev. 00C
01/20/05
AC ELECTRICAL CHARACTERISTICS
Notes:
1. When power is first applied, memory operation should be started 100 µs after V
2. Measured with t
3. Assumed input rise and fall time (t
4. Access time is measured at 1.5V with the load shown in the figure below.
5. The time t
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK3
CK2
AC3
AC2
CHI
CL
OH3
OH2
LZ
HZ3
HZ2
DS
DH
AS
AH
CKS
CKH
CKA
CS
CH
RC
RAS
RP
RCD
RRD
DPL3
DPL2
DAL3
DAL2
T
REF
Also note that the power-on sequence must be executed before starting memory operation.
considered and (t
when the output is in the high impedance state.
Clock Cycle Time
Access Time From CLK
CLK HIGH Level Width
CLK LOW Level Width
Output Data Hold Time
Output LOW Impedance Time
Output HIGH Impedance Time
Input Data Setup Time
Input Data Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
CKE Hold Time
CKE to CLK Recovery Delay Time
Command Setup Time (CS, RAS, CAS, WE, DQM)
Command Hold Time (CS, RAS, CAS, WE, DQM)
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Active Command To Read / Write Command Delay Time
Command Period (ACT [0] to ACT[1])
Input Data To Precharge
Command Delay time
Input Data To Active / Refresh CAS Latency = 3
Command Delay time (During Auto-Precharge)
Transition Time
Refresh Cycle Time (4096)
HZ
(max.) is defined as the time required for the output voltage to transition by ± 200 mV from V
T
= 1 ns. If clock rising time is longer than 1ns, (t
R
+ t
F
(2,3)
) / 2-1 ns should be added to the parameter.
(2,3)
(2,3)
(2,3)
(2,3)
(2,3)
(4)
R
CAS Latency = 2
CAS Latency = 2
CAS Latency = 2
(5)
& t
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 3
F
) = 1ns. If t
Min.
R
and t
(2,3)
(2,3)
(1,2,3)
F
are longer than 1ns, transient time compensation should be
2CLK+t
2CLK+t
1CLK+3
2CLK
2CLK
Max.
1-800-379-4774
R
2.5
2.5
2.5
2.5
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
0.5
60
37
18
18
12
—
—
—
—
—
—
6
0
/2 - 0.5) ns should be added to the parameter.
-6
RP
RP
120,000
Min.
5.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30
64
—
—
—
—
—
—
—
6
6
—
—
—
DD
2CLK+t
2CLK+t
1CLK+3
and V
2CLK
2CLK
Max.
2.5
2.5
2.5
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
0.5
2.5
10
63
37
18
18
14
—
—
—
—
—
7
0
-7
RP
RP
DDQ
120,000
Min.
5.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30
64
—
reach their stipulated voltages.
—
6
—
—
—
—
—
6
6
—
—
—
2CLK+t
2CLK+t
1CLK+3
2CLK
2CLK
Max
3.5
3.5
2.5
2.5
2.0
2.0
2.0
2.0
0.5
10
10
70
44
20
20
15
—
—
—
—
—
0
1
1
1
1
OH
-10
RP
RP
(min.) or V
ISSI
120,000
Units
30
64
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
7
9
7
9
OL
(max.)
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17
®