is42s16160c-7tli Integrated Silicon Solution, Inc., is42s16160c-7tli Datasheet - Page 17

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is42s16160c-7tli

Manufacturer Part Number
is42s16160c-7tli
Description
256 Mb Single Data Rate Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

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Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
12/05/08
IS42S83200C
IS42S16160C, IC42S16160C
Write operation
Burst write or single write mode is selected
1. Burst write: A burst write operation is enabled by setting OPCODE (A9, A8) to (0, 0). A burst write starts in the same clock
.
2. Single write: A single write operation is enabled by setting OPCODE (A9, A8) to (1, 0). In a single write operation, data is
as a write command set. (The latency of data input is 0 clock.) The burst length can be set to 1, 2, 4 and 8, like burst read
operations. The write start address is specified by the column address and the bank select address at the write command
set cycle.
only written to the column address and the bank select address specified by the write command set cycle without regard to
the burst length setting. (The latency of data input is 0 clock).
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