at49lw080 ATMEL Corporation, at49lw080 Datasheet - Page 9

• Manufacturer Part Number: at49lw080
• Description: 8-megabit Firmware Hub Flash Memory
• Manufacturer: ATMEL Corporation

6.1.2
6.1.3
Figure 6-1.
1966G–FLASH–3/05
FWH[3:0]
FWH4
Turn-around (TAR)
SYNC
CLK
FWH Single-byte Read Waveforms
START
IDSEL
This field is two clocks wide, and is driven by the master when it is turning control over to the
FWH, (for example, to read data), and is driven by the FWH when it is turning control back over
to the master. On the first clock of this two-clock-wide field, the master or FWH drives the
FWH[3:0] lines to “1111b”. On the second clock of this field, the master or peripheral tri-states
the FWH[3:0] lines.
This field is used to add wait states. It can be several clocks in length. On target or DMA cycles,
this field is driven by the FWH. If the FWH needs to assert wait states, it does so by driving
“0101b” (short SYNC) on FWH[3:0] until it is ready. When ready, it will drive “0000b”. Valid val-
ues for this field are shown in
Table 6-1.
Bits[3:0]
0000
0101
PREAMBLE
MADDR
Valid SYNC Values
Indication
Ready: SYNC achieved with no error.
Short Wait: Part indicating wait states.
MSIZE
Table
TAR
6-1.
SYNC(3)
DATA
TAR
AT49LW080
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