at49lh00b4 ATMEL Corporation, at49lh00b4 Datasheet - Page 24

• Manufacturer Part Number: at49lh00b4
• Description: 4-megabit Top Boot, Bottom Partitioned Firmware Hub And Low-pin Count Flash Memory
• Manufacturer: ATMEL Corporation

13.2
24
LPC Multiple Device Selection
AT49LH00B4
Table 13-1.
For LPC memory cycles, the inverse state of the strapping values on the ID[3:0] pins are com-
pared against address bits A22-A19 to determine if the device should respond. If there is a
mismatch, the device will ignore the remainder of the cycle. The device will then enter standby
mode when the FWH4/LFRAME pin is high and no internal operation is in progress. The
FWH/LAD[3:0] pins will also be placed in a high-impedance state.
0 (Boot Device)
Device
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
FWH Multiple Device Selection
ID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ID2
ID Strapping Pins
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3379C–FLASH–3/05
IDSEL
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b