at49bv8192t-20ti ATMEL Corporation, at49bv8192t-20ti Datasheet - Page 4

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at49bv8192t-20ti

Manufacturer Part Number
at49bv8192t-20ti
Description
At49bv8192 8-megabit 512k X 16 Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
result in the complement of the loaded data on I/O7. Once
the program cycle has been completed, true data is valid
on all outputs and the next cycle may begin. During a chip
or sector erase operation, an attempt to read the device will
give a “0” on I/O7. Once the program or erase cycle has
completed, true data will be read from the device. DATA
polling may begin at any time during the program cycle.
T O G G L E B I T : I n a d d i t i o n t o D A T A p o l l i n g t h e
AT49BV/LV8192(T) provides another method for determin-
ing the end of a program or erase cycle. During a program
or erase operation, successive attempts to read data from
the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop
toggling and valid data will be read. Examining the toggle
bit may begin at any time during a program cycle.
4
AT49BV/LV8192(T)
HARDWARE DATA PROTECTION: Hardware features
p r o t e c t a g a i n s t i n a d v e r t e n t p r o g r a m s t o t h e
AT49BV/LV8192(T) in the following ways: (a) V
V
ited. (b) V
V
ms (typical) before programming. (c) Program inhibit: hold-
ing any one of OE low, CE high or WE high inhibits pro-
gram cycles. (d) Noise filter: pulses of less than 15 ns
(typical) on the WE or CE inputs will not initiate a program
cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V
power supply, the address inputs and control inputs (OE,
CE, and WE) may be driven from 0 to 5.5V without
adversely affecting the operation of the device. The I/O
lines can only be driven from 0 to V
CC
CC
is below 1.8V (typical), the program function is inhib-
sense level, the device will automatically time out 10
CC
power on delay: once V
CC
+ 0.6V.
CC
has reached the
CC
sense: if

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