at49bv001nt-90pi ATMEL Corporation, at49bv001nt-90pi Datasheet

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at49bv001nt-90pi

Manufacturer Part Number
at49bv001nt-90pi
Description
1-megabit 128k X 8 Single 2.7-volt Battery-voltage? Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
Note:
Pin Configurations
Features
Description
The AT49BV/LV001(N)(T) is a 3-volt-only in-system reprogrammable Flash memory.
Its 1 megabit of memory is organized as 131,072 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to
70 ns with power dissipation of just 90 mW over the commercial temperature range.
When the device is deselected, the CMOS standby current is less than 50 µA. For the
Pin Name
A0 - A16
CE
OE
WE
RESET
I/O0 - I/O7
DC
NC
Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV)
Fast Read Access Time – 70 ns
Internal Program Control and Timer
Sector Architecture
Fast Erase Cycle Time – 10 Seconds
Byte-by-byte Programming – 30 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
– One 16-Kbyte Boot Block with Programming Lockout
– Two 8-Kbyte Parameter Blocks
– Two Main Memory Blocks (32K, 64K Bytes)
– 25 mA Active Current
– 50 µA CMOS Standby Current
*This pin is a DC on the AT49BV001N(T) and AT49LV001N(T).
I/O0
A7
A6
A5
A4
A3
A2
A1
A0
5
6
7
8
9
10
11
12
13
PLCC Top View
Function
Addresses
Chip Enable
Output Enable
Write Enable
RESET
Data Inputs/Outputs
Don’t Connect
No Connect
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
TSOP Top View (8 x 20mm) – Type 1
*RESET
VCC
A11
A13
A14
A16
A15
A12
WE
NC
VSOP Top View (8 x 14mm) or
A9
A8
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
*RESET
DIP Top View
GND
I/O0
I/O1
I/O2
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
WE
NC
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
A14
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
1-megabit
(128K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV001
AT49LV001
AT49BV001N
AT49LV001N
AT49BV001T
AT49LV001T
AT49BV001NT
AT49LV001NT
1110C–FLASH–9/03

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at49bv001nt-90pi Summary of contents

Page 1

... VCC 8 25 *RESET 9 24 A16 10 23 A15 11 22 A12 1-megabit (128K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT49BV001 AT49LV001 AT49BV001N AT49LV001N AT49BV001T AT49LV001T AT49BV001NT AT49LV001NT OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/ 1110C–FLASH–9/03 ™ ...

Page 2

... PARAMETER 07FFF PARAMETER BLOCK 2 BLOCK 2 (8K BYTES) (8K BYTES) 06000 MAIN MEMORY 05FFF PARAMETER BLOCK 1 BLOCK 1 (32K BYTES) (8K BYTES) 04000 MAIN MEMORY 03FFF BOOT BLOCK BLOCK 2 (16K BYTES) (64K BYTES) 00000 8 1FFFF 1C000 1BFFF 1A000 19FFF 18000 17FFF 10000 0FFFF 00000 ...

Page 3

... AT49BV/LV001N(T). ERASURE: Before a byte can be reprogrammed, the main memory block or parameter block which contains the byte must be erased. The erased state of the memory bits is a logical “1”. The entire device can be erased at one time by using a 6-byte software code. The software chip erase code consists of 6-byte load commands to specific address locations with a specific data pattern (please refer to the Chip Erase Cycle Waveforms) ...

Page 4

... AT49BV/LV001(N)T. Once the feature is enabled, the data in the boot block can no longer be erased or pro- grammed with input voltage level of 5.5V or less. Data in the main memory block can still be changed through the regular programming method. To activate the lockout feature, a series of six program commands to specific addresses with specific data must be performed ...

Page 5

BOOT BLOCK PROGRAMMING LOCKOUT OVERRIDE: The user can override the boot block programming lockout by taking the RESET pin to 12 volts during the entire chip erase, sector erase or byte programming operation. When the RESET pin is brought back ...

Page 6

... SA = 18000 to 19FFF for PARAMETER BLOCK 10000 to 17FFF for MAIN MEMORY ARRAY BLOCK 1 This command will erase - PB1, PB2 and MMB1 SA = 00000 to 0FFFF for MAIN MEMORY ARRAY BLOCK 2 Absolute Maximum Ratings* Temperature Under Bias................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C ...

Page 7

DC and AC Operating Range Operating Com. Temperature (Case) Ind. V Power Supply CC Operating Modes Mode CE Read V IL (2) Program/Erase V IL Standby/Write Inhibit V IH Program Inhibit X Program Inhibit X Output Disable X Reset X ...

Page 8

AC Read Characteristics Symbol Parameter t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF t Output Hold from OE, CE ...

Page 9

AC Byte Load Characteristics Symbol Parameter Address, OE Set-up Time AS OES t Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) WP ...

Page 10

Program Cycle Characteristics Symbol Parameter t Byte Programming Time BP t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width High ...

Page 11

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See t ...

Page 12

Software Product (1) Identification Entry LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 90 TO ADDRESS 5555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE Software Product (1) Identification Exit OR LOAD DATA AA TO ADDRESS 5555 ...

Page 13

AT49LV001T Ordering Information I (mA ACC (ns) Active Standby 70 50 0 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual ...

Page 14

AT49BV001 Ordering Information I (mA ACC (ns) Active Standby 90 50 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual In-line Package (PDIP) 32T 32-lead, ...

Page 15

AT49LV001 Ordering Information I (mA ACC (ns) Active Standby 70 50 0 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual ...

Page 16

AT49BV001N Ordering Information I (mA ACC (ns) Active Standby 90 50 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual In-line Package (PDIP) 32T 32-lead, ...

Page 17

AT49LV001N Ordering Information I (mA ACC (ns) Active Standby 70 50 0 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual ...

Page 18

AT49BV001T Ordering Information I (mA ACC (ns) Active Standby 90 50 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual In-line Package (PDIP) 32T 32-lead, ...

Page 19

... Plastic Thin Small Outline Package (VSOP mm) 1110C–FLASH–9/03 Ordering Code Package AT49BV001NT-90JC 32J AT49BV001NT-90PC 32P6 AT49BV001NT-90TC 32T AT49BV001NT-90VC 32V AT49BV001NT-90JI 32J AT49BV001NT-90PI 32P6 AT49BV001NT-90TI 32T AT49BV001NT-90VI 32V AT49BV001NT-12JC 32J AT49BV001NT-12PC 32P6 AT49BV001NT-12TC 32T AT49BV001NT-12VC 32V AT49BV001NT-12JI ...

Page 20

AT49LV001NT Ordering Information t ACC (ns) I (mA 0 0.1 50 0.3 120 50 0.1 50 0.3 32J 32-lead, Plastic, J-leaded Chip Carrier Package (PLCC) 32P6 32-lead, 0.600" Wide, Plastic Dual In-line Package ...

Page 21

Packaging Information 32J – PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) ...

Page 22

PDIP A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ...

Page 23

TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and on ...

Page 24

VSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BA. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and on ...

Page 25

... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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