at25df321a ATMEL Corporation, at25df321a Datasheet - Page 5

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at25df321a

Manufacturer Part Number
at25df321a
Description
32-megabit 2.7-volt Minimum Spi Serial Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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3. Block Diagram
Figure 3-1.
4. Memory Array
3686C–DFLASH–12/08
SO (SOI)
SI (SIO)
HOLD
SCK
WP
CS
Block Diagram
INTERFACE
CONTROL
To provide the greatest flexibility, the memory array of the AT25DF321A can be erased in four
levels of granularity including a full chip erase. In addition, the array has been divided into phys-
ical sectors of uniform size, of which each sector can be individually protected from program and
erase operations. The size of the physical sectors is optimized for both code and data storage
applications, allowing both code and data segments to reside in their own isolated regions. The
Memory Architecture Diagram illustrates the breakdown of each erase level as well as the
breakdown of each physical sector.
LOGIC
AND
PROTECTION LOGIC
CONTROL AND
Y-DECODER
X-DECODER
AT25DF321A [Preliminary]
AND LATCHES
MEMORY
I/O BUFFERS
Y-GATING
ARRAY
FLASH
DATA BUFFER
SRAM
5

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