93c46b-st Microchip Technology Inc., 93c46b-st Datasheet - Page 8

• Manufacturer Part Number: 93c46b-st
• Description: 1k Microwire Compatible Serial Eeprom
• Manufacturer: Microchip Technology Inc.

93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.5
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
FIGURE 2-3:
FIGURE 2-4:
DS21749F-page 8
CLK
CLK
DO
DO
CS
DI
V
CS
DI
CC
must be
Erase All (ERAL)
High-Z
High-Z
4.5V for proper operation of ERAL.
1
1
ERAL TIMING FOR 93AA AND 93LC DEVICES
ERAL TIMING FOR 93C DEVICES
0
0
0
0
1
1
0
0
x
x
•••
•••
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (T
V
x
x
CC
Note:
T
T
must be
CSL
CSL
CSL
).
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
T
EC
T
T
T
4.5V for proper operation of ERAL.
SV
EC
SV
Check Status
Check Status
Busy
Busy
© 2005 Microchip Technology Inc.
Ready
Ready
High-Z
High-Z
T
T
CZ
CZ