24lc128-i-st Microchip Technology Inc., 24lc128-i-st Datasheet - Page 9

• Manufacturer Part Number: 24lc128-i-st
• Description: 128k I2c Cmos Serial Eeprom
• Manufacturer: Microchip Technology Inc.

7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for
flow diagram.
© 2007 Microchip Technology Inc.
ACKNOWLEDGE POLLING
24AA128/24LC128/24FC128
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
Send Start
Did Device
(ACK = 0)?
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
Yes
No
DS21191P-page 9