24lc16bt-st Microchip Technology Inc., 24lc16bt-st Datasheet - Page 8

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24lc16bt-st

Manufacturer Part Number
24lc16bt-st
Description
16k I2c Serial Eeprom
Manufacturer
Microchip Technology Inc.
Datasheet
24AA16/24LC16B
5.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W =
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 5-1 for a flow diagram of
this operation.
FIGURE 5-1:
DS21703G-page 8
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
(ACK = 0)?
Send Start
Did Device
Operation
Send
Next
ACKNOWLEDGE POLLING
FLOW
Yes
0
). If the device is still
No
6.0
The WP pin allows the user to write-protect the entire
array (000-7FF) when the pin is tied to V
V
SS
the write protection is disabled.
WRITE PROTECTION
© 2007 Microchip Technology Inc.
CC
. If tied to

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