DS1961S-F5 Maxim Integrated Products, DS1961S-F5 Datasheet - Page 15

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DS1961S-F5

Manufacturer Part Number
DS1961S-F5
Description
DS1961S 1kb Protected EePROM Ibutton With SHA-1 Engine
Manufacturer
Maxim Integrated Products
Datasheet

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Figure 7-6. MEMORY AND SHA FUNCTIONS FLOW CHART (continued)
From Figure 7
To Figure 7
N
5th Part
5th Part
Bus Master
TX Reset ?
RX “1”s
Master
Y
DS1961S Sets EN_LFS = 0
N
TA1 (T7:T0), TA2 (T15:T8)
Y
DS1961S sets Memory
Bus Master RX CRC16
of Command, Address,
From Memory Address
Master RX Data Byte
Address = (T15:T0)
Data, and FFh Byte
Bus Master TX
One Byte FFh
TX Reset ?
TX Reset ?
Read Auth.
Master RX
Of Page ?
Address
* 1-Wire Idle High for Power
< 80h ?
Master
Master
Page ?
End
A5h
Y
Y
N
Y
Y
15 of 36
N
N
N
Increments
DS1961S
Address
Counter
Note: Three Bytes of the
Scratchpad Contents are Taken
as a Challenge to the DS1961S.
The Master can Specify the
Challenge or Accept the Current
Scratchpad Contents Instead.
N
Bus Master RX CRC16 of
Message Authentication
Code of Secret, Data of
SHA Engine Computes
Selected Page, Device
Bus Master RX 160-Bit
Message Auth. Code
Message Auth. Code
Identity Register and
3-Byte Challenge
DS1961S TX “0”
DS1961S TX “1”
TX Reset ?
TX Reset ?
Master
Master
Duration: t
From Figure 7
Y
To Figure 7
N
7th Part
7th Part
CSHA
Y
*

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