74avc2t45 NXP Semiconductors, 74avc2t45 Datasheet - Page 23

• Manufacturer Part Number: 74avc2t45
• Description: 74avc2t45 Dual-bit, Dual-supply Voltage Level Translator/transceiver; 3-state
• Manufacturer: NXP Semiconductors

NXP Semiconductors
74AVC2T45_1
Product data sheet
13.3 Power-up considerations
13.4 Enable times
The device is designed such that no special power-up sequence is required other than
GND being applied first.
Table 13.
Calculate the enable times for the 74AVC2T45 using the following formulas:
In a bidirectional application, these enable times provide the maximum delay from the time
the DIR bit is switched until an output is expected. For example, if the 74AVC2T45 initially
is transmitting from A to B, then the DIR bit is switched, the B port of the device must be
disabled before presenting it with an input. After the B port has been disabled, an input
signal applied to it appears on the corresponding A port after the specified propagation
delay.
V
0 V
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
•
•
CC(A)
t
t
en
en
(DIR to nA) = t
(DIR to nB) = t
V
0 V
0
0.1
0.1
0.1
0.1
0.1
0.1
Typical total supply current (I
CC(B)
0.8 V
0.1
0.1
0.1
0.1
0.1
0.7
2.3
Dual-bit, dual-supply voltage level translator/transceiver; 3-state
dis
dis
Rev. 01 — 3 July 2007
(DIR to nB) + t
(DIR to nA) + t
1.2 V
0.1
0.1
0.1
0.1
0.1
0.3
1.4
CC(A)
pd
pd
1.5 V
0.1
0.1
0.1
0.1
0.1
0.1
0.9
(nB to nA)
(nA to nB)
+ I
CC(B)
1.8 V
0.1
0.1
0.1
0.1
0.1
0.1
0.5
)
2.5 V
0.1
0.7
0.3
0.1
0.1
0.1
0.1
74AVC2T45
3.3 V
0.1
2.3
1.4
0.9
0.5
0.1
0.1
© NXP B.V. 2007. All rights reserved.
Unit
A
A
A
A
A
A
A
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