74abt16646dl NXP Semiconductors, 74abt16646dl Datasheet - Page 2

• Manufacturer Part Number: 74abt16646dl
• Description: 74abt16646; 74abth16646 16-bit Bus Transceiver/register 3-state
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN DESCRIPTION
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
1998 Feb 27
Independent registers for A and B buses
Multiple V
Live insertion/extraction permitted
Power–up 3-State
Power–up reset
Multiplexed real-time and stored data
Outputs sink 64mA and source 32mA
Latch–up protection exceeds 500mA per JEDEC Std 17
74ABTH16646 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
16-bit bus transceiver/register (3-State)
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
4, 11, 18, 25, 32, 39, 46, 53
SYMBOL
5, 6, 8, 9, 10, 12, 13, 14
I
I
t
t
C
C
PLH
PHL
CC
CCZ
CC
PACKAGES
I/O
IN
PIN NUMBER
and GND pins minimize switching noise
2, 55, 27, 30
3, 54, 26, 31
7, 22, 35, 50
56, 29
1, 28
Propagation delay
nAx to nBx
Input capacitance
I/O capacitance
Quiescent supply current
Quiescent supply current
TEMPERATURE RANGE
PARAMETER
1CPAB, 1CPBA, 2CPAB, 2CPBA
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
1SAB, 1SBA, 2SAB, 2SBA
1DIR, 2DIR
1A0 – 1A7,
1B0 – 1B7,
2A0 – 2A7
2B0 – 2B7
1OE, 2OE
SYMBOL
GND
V
CC
OUTSIDE NORTH AMERICA
2
74ABTH16646 DGG
74ABT16646 DGG
74ABTH16646 DL
74ABT16646 DL
DESCRIPTION
The 74ABT16646 high–performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16646 16-bit transceiver/register consists of two sets of
bus transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or from the internal registers. Data on the
A or B bus will be clocked into the registers as the appropriate clock
pin goes High. Output Enable (nOE) and Direction (nDIR) pins are
provided to control the transceiver function. In the transceiver mode,
data present at the high impedance port may be stored in either the
A or B register or both.
The select (nSAB, nSBA) pins determine whether data is stored or
transferred through the device in real-time. The nDIR determines
which bus will receive data when the nOE is active Low. In the
isolation mode (nOE = High), data from Bus A may be stored in the
B register and/or data from Bus B may be stored in the A register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B may be driven at a time.
Two options are available, 74ABT16646 which does not have the
bus-hold feature and 74ABTH16646 which incorporates the
bus-hold feature.
Outputs disabled; V
T
V
Outputs low; V
amb
C
O
L
= 0V or V
Clock input A to B / Clock input B to A
Select input A to B / Select input B to A
Direction control inputs
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable inputs
Ground (0V)
Positive supply voltage
= 50pF; V
V
CONDITIONS
= 25 C; GND = 0V
I
= 0V or V
CC
CC
CC
; 3-State
CC
CC
= 5V
=5.5V
NAME AND FUNCTION
=5.5V
NORTH AMERICA
BH16646 DGG
BT16646 DGG
BT16646 DL
BH16646 DL
74ABTH16646
74ABT16646
TYPICAL
Product specification
550
3.3
2.7
3
7
9
DWG NUMBER
853-1782 19026
SOT371-1
SOT364-1
SOT371-1
SOT364-1
UNIT
mA
pF
pF
ns
A