lmv712ldx National Semiconductor Corporation, lmv712ldx Datasheet - Page 10

• Manufacturer Part Number: lmv712ldx
• Description: Low Power, Low Noise, High Output, Rrio Dual Operational Amplifier With Independent Shutdown
• Manufacturer: National Semiconductor Corporation

www.national.com
Application Information
THEORY OF OPERATION
The LMV712 dual op amp is derived from the LMV711 single
op amp. Figure 1 contains a simplified schematic of one chan-
nel of the LMV712.
Rail-to-Rail input is achieved by using in parallel, one NMOS
differential pair (MN1 and MN2) and one PMOS differential
pair (MP1 and MP2). When the common mode input voltage
(V
off. When V
pair is on. When V
cides how much current each differential pair will get. This
special logic ensures stable and low distortion amplifier op-
eration within the entire common mode voltage range.
Because both input stages have their own offset voltage
(V
comes a function of V
above V
formance Characteristics section. Caution should be taken in
situations where input signal amplitude is comparable to
V
situations, it is necessary for the input signal to avoid the
crossover point.
The current coming out of the input differential pairs gets mir-
rored through two folded cascode stages (Q1, Q2, Q3, Q4)
into the "class AB control" block. This circuitry generates volt-
age gain, defines the op amp's dominant pole and limits the
maximum current flowing at the output stage. MN3 introduces
a voltage level shift and acts as a high impedance to low
impedance buffer.
The output stage is composed of a PMOS and a NPN tran-
sistor in a common source/emitter configuration, delivering a
rail-to-rail output excursion.
OS
CM
OS
value and/or the design requires high accuracy. In these
) characteristic, the offset voltage of the LMV712 be-
) is near V
−
. Refer to the "V
CM
is near V
+
, the NMOS pair is on and the PMOS pair is
CM
is between V
CM
−
, the NMOS pair is off and the PMOS
. V
OS
OS
vs. V
has a crossover point at 1.4V
CM
+
" curve in the Typical Per-
and V
−
, internal logic de-
FIGURE 1.
10
The MN4 transistor ensures that the LMV712 output remains
near V
SHUTDOWN PIN
The LMV712 offers independent shutdown pins for the dual
amplifiers. When the shutdown pin is tied low, the respective
amplifier shuts down and the supply current is reduced to less
than 1µA. In shutdown mode, the amplifier's output level stays
at V
2.7V is applied to the shutdown pin, the amplifier is enabled.
As the amplifier is coming out of the shutdown mode, the out-
put waveform ramps up without any glitch. This is demon-
strated in Figure 2.
−
. In a 2.7V operation, when a voltage between 1.5V to
−
when the amplifier is in shutdown mode.
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