lm21215mhx National Semiconductor Corporation, lm21215mhx Datasheet - Page 16

• Manufacturer Part Number: lm21215mhx
• Description: 15a High Efficiency Synchronous Buck Regulator
• Manufacturer: National Semiconductor Corporation

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during normal operation. The maximum ripple current can be
described as:
where V
the respective maximum and minimum conditions of the sys-
tem as defined by the component tolerance and device vari-
ation. From this, the maximum allowable current through the
high-side FET (I
where I
to 15 A. Once the I
inal value of the R
where the R
the given I
take into account the device variation over V
ture, as seen seen in the Electrical Characteristics table for
the I
tics. These variations can cause the I
depending on the range of the input voltage and junction tem-
perature.
CONTROL LOOP COMPENSATION
The LM21215 incorporates a high bandwidth amplifier be-
tween the FB and COMP pins to allow the user to design a
compensation network that matches the application. This
section will walk through the various steps in obtaining the
open loop transfer function.
There are three main blocks of a voltage mode buck switcher
that the power supply designer must consider when designing
the control system; the power train, modulator, and the com-
pensated error amplifier. A closed loop diagram is shown in
Figure
CLR
8.
OUTMAX
INMAX
parameter and the typical performance characteris-
HSMAX
ILIM
, V
is the maximum defined DC output current, up
value is the nominal resistance necessary for
INMIN
HSMAX
value. A conservative design should also
ILIM
HSMAX
, V
resistor can be calculated as follows:
) of device can be described as:
OUTMAX
value has been determined, a nom-
, V
OUTMIN
HSMAX
, L
MIN
value to increase,
IN
and F
and tempera-
SWMIN
are
16
The power train consists of the output inductor (L) with DCR
(DC resistance R
tive series resistance R
error amplifier (EA) constantly forces FB to 0.6V. The passive
compensation components around the error amplifier help
maintain system stability. The modulator creates the duty cy-
cle by comparing the error amplifier signal with an internally
generated ramp set at the switching frequency.
There are three transfer functions that must be taken into
consideration when obtaining the total open loop transfer
function; COMP to SW (Modulator) , SW to V
Train), and V
transfer function is simply the gain of the PWM modulator.
where ΔV
(nominally 0.8 V). The SW to COMP transfer function includes
the output inductor, output capacitor, and output load resis-
tance. The inductor and capacitor create two complex poles
at a frequency described by:
In addition to two complex poles, a left half plane zero is cre-
ated by the output capacitor ESR located at a frequency
described by:
A Bode plot showing the power train response can be seen
below.
RAMP
OUT
is the oscillator peak-to-peak ramp voltage
to COMP (Error Amplifier). The COMP to SW
FIGURE 8. Loop Diagram
DCR
) , output capacitor (C
ESR
), and load resistance (R
0
) with ESR (effec-
OUT
(Power
o
). The
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