sae81c80a Infineon Technologies Corporation, sae81c80a Datasheet - Page 15

• Manufacturer Part Number: sae81c80a
• Description: Cmos Dual-port Ram
• Manufacturer: Infineon Technologies Corporation

SAE 81C80 A
The following applies only to the scheduling registers:
Usually, in the case of a concurrent access by both processors, writing has priority over
reading. However, a simultaneous read or write access from the two ports means that
port 1 has priority over port 2.
The addresses of the scheduling registers are listed in table 1.
The assignment of scheduling registers to specific data areas is made by the user. The
software (of both controllers) should be configured so that, prior to accessing a logically
related data area, the associated scheduling register is accessed first (according to the
above sequence).
So the assignment of the various dual-port RAM address spaces to scheduling registers
will depend solely on the structure of the user software.
Figure 6
Diagram Showing the Various States of the Scheduling Registers
Only the two least significant bits of the data are shown (in converted commas).
Semiconductor Group
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