lt5526euf-trpbf Linear Technology Corporation, lt5526euf-trpbf Datasheet
lt5526euf-trpbf
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lt5526euf-trpbf Summary of contents
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... Unlike passive mixers which have conver- sion loss and require high LO drive levels, the LT5526 delivers conversion gain at significantly lower LO input levels and is much less sensitive to LO power level variations. , LTC and LT are registered trademarks of Linear Technology Corporation ...
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... Requires RF Matching Requires DC Blocks Requires IF Matching CONDITIONS Z = 50Ω, External Match 50Ω, External DC Blocks 50Ω, External Match INFORMATION ORDER PART TOP VIEW NUMBER LT5526EUF 12 GND + – GND PART MARKING UF PACKAGE 5526 = 125°C, θ ...
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AC ELECTRICAL CHARACTERISTICS IIP3 tests, ∆f = 1MHz –5dBm, unless otherwise noted. Test circuits shown in Figures 1 and 2. (Notes PARAMETER Isolation Conversion Gain Conversion Gain vs Temperature Input 3rd Order ...
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LT5526 W U TYPICAL AC PERFOR A CE CHARACTERISTICS T = 25° –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz 140MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and ...
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W U TYPICAL AC PERFOR A CE CHARACTERISTICS T = 25° –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz 140MHz, unless otherwise noted. Test circuit shown in Figure × 2 ...
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LT5526 W U TYPICAL AC PERFOR A CE CHARACTERISTICS T = 25° –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz 70MHz, unless otherwise noted. Test circuit shown in Figure 2. Conversion Gain and IIP3 ...
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CTIO S NC (Pins 13, 16): Not Connected Internally. These pins should be grounded on the circuit board for improved LO-to-RF and LO-to-IF isolation. + – (Pins 2, 3): ...
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LT5526 TEST CIRCUITS 900MHz 1900MHz INPUT MATCHING: C1: 1.5pF T1: LDB311G9010C-440 REF DES VALUE SIZE PART NUMBER C1 2.7pF 0402 AVX 04025A2R7CAT C2 0.01µF 0402 AVX 04023C103JAT C3 1.2pF 0402 AVX 04025A1R2BAT ...
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U U APPLICATIO S I FOR ATIO The LT5526 consists of a double-balanced mixer, RF buffer amplifier, high speed limiting LO buffer and bias/enable circuits. The IC has been optimized for downconverter applications with RF input signals to 2GHz and ...
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LT5526 U U APPLICATIO S I FOR ATIO The external inductance is split in half (1.4nH), with each half connected between the pin and C1 as shown in Figure 4. The inductance may be realized with short, high impedance printed ...
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U U APPLICATIO S I FOR ATIO The purpose provide a DC return path for Pin 3. (Another possible placement for L5 would be across Pins 2 and 3, thus using L1 as part of the ...
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LT5526 U U APPLICATIO S I FOR ATIO through impedance-matching inductors. Each IF pin draws about 7.5mA of supply current (15mA total). For optimum single-ended performance, these differential outputs must be combined externally through an IF transformer or balun. LT5526 ...
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U U APPLICATIO S I FOR ATIO R • ω • R ω Inductors L13 and L14 provide a DC path ...
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LT5526 U TYPICAL APPLICATIO S Top Layer Silkscreen 14 Evaluation Board Layouts Top Layer Metal 5526f ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 16-Lead Plastic QFN (4mm × ...
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... BW S/H, 75.5dB SNR, 90dB SFDR, 2.25V Input Ranges www.linear.com ● Offset Control, Shutdown, Adjustable Gain OUT Offset Control, Shutdown, Adjustable Offset OUT Offset Control, Adjustable Gain and Offset OUT or 1.35V P-P LT/TP 0704 1K • PRINTED IN THE USA © LINEAR TECHNOLOGY CORPORATION 2004 P-P 5526f ...