adl5201 Analog Devices, Inc., adl5201 Datasheet
adl5201
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adl5201 Summary of contents
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... VINA– Figure 1. The ADL5201 is powered on by applying the appropriate logic level to the PWUP pin. The quiescent current of the ADL5201 is typically may be configured for higher quiescent current of 110 mA, in high performance power mode, for more demanding applications. When powered down, the ADL5201 consumes less than 9 mA and offers excellent input to output isolation ...
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... ADL5201 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 6 Thermal Resistance ...................................................................... 6 REVISION HISTORY 10/10—Rev. PrD 10/10—Rev. PrC 9/10—Rev. PrB 9/10—Rev. PrA Preliminary Technical Data ESD Caution...................................................................................6 Pin Configuration and Function Descriptions ..............................7 Digital Interface Overview ...............................................................8 ...
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... Gain Code = 000000 Low p-p OUT p-p OUT Gain Code = 000000 High p-p OUT p-p OUT Gain Code = 000000 Low p-p OUT p-p OUT Rev. PrD | Page ADL5201 Min Typ Max Unit 700 MHz TBD V/nsec 8 V p-p 150 Ω 1.5 V TBD −11.5 dB 0.5 ...
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... ADL5201 Parameter 70 MHz [Nominal Power Mode] Noise Figure Second Harmonic Third Harmonic Output IP3 Output 1 dB Compression Point NOISE/HARMONIC PERFORMANCE 140 MHz [High Performance Power Mode] Noise Figure Second Harmonic Third Harmonic Output IP3 Output 1 dB Compression Point 140 MHz [Nominal Power Mode] ...
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... Minimum voltage to enable the device Digital pins Minimum voltage for a logic high Maximum voltage for a logic low PM = Low (High Performance Power Mode High (Nominal Power Mode) PWUP Low Rev. PrD | Page ADL5201 Min Typ Max Unit 7.6 dB −78 dBc −90 dBc 45 ...
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... ADL5201 ABSOLUTE MAXIMUM RATINGS Table Summary Table 2. Parameter Supply Voltage, V POS PWUP, Digital Pins Input Voltage IN+ IN- Internal Power Dissipation θ (Exposed paddle soldered down) JA θ (Exposed paddle not soldered down) JA θ (At exposed paddle) JC Maximum Junction Temperature Operating Temperature Range ...
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... Latch, a low input results in gain change. A high input results in no gain change. Positive output. Negative output. Positive power supply. Power up pin. A logic high enables the part. High performance power mode (active high), Nominal power mode (low) Rev. PrD | Page VPOS 17 VOUT– 16 VOUT+ 15 VOUT– 14 VOUT+ 13 LATCH ADL5201 ...
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... ADL5201 DIGITAL INTERFACE OVERVIEW The ADL5201 DVGA has three digital control interface options: • Parallel Control Interface • Serial Peripheral Interface • Gain Step Up/Down Interface The digital control interface selection is made via 2 digital pins, MODE1 and MODE0, as shown in Table 5. There are two common digital control pins, PM and PWUP ...
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... FREQUENCY (MHz) Figure 9. S11, S12 and S22 Vs. Frequency HD2 0 50 100 150 200 250 Frequency (MHz) Figure 10. Harmonic Distortion Vs. Frequency 2Vp-p Out ADL5201 350 400 450 500 S11 S22 S12 700 800 900 1000 HD3 300 350 400 ...
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... Model Temperature Range 1 ADL5201XCPZ-R7 −40°C to +85°C 1 ADL5201XCPZ-WP −40°C to +85°C ADL5201-EVALZ 1 −40°C to +85° RoHS Compliant Part ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR09388-0-10/10(PRD) ...