pef82902 Infineon Technologies Corporation, pef82902 Datasheet - Page 183

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pef82902

Manufacturer Part Number
pef82902
Description
4b3t Second Generation Modular Isdn Nt Intelligent Extended
Manufacturer
Infineon Technologies Corporation
Datasheet

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RIC
SQC
SQW
1)
4.5.8
MASKS
Value after reset: FF
Bit 3..0
Data Sheet
Register SQRR stays valid as long as no code change has been received.
7
1
Receiver INFO Change
0 =
1 =
S/Q-Channel Change
0 =
1 =
S/Q-Channel Writable
0 =
1 =
MASKS - Mask S-Transceiver Interrupt
Mask bits
1
inactive
RIC is activated if one of the S_STA bits RINF or ICV has changed.
inactive
A change in the received 4-bit Q-channel has been detected. The
new code can be read from the SQRx bits of registers SQRR within
the next multiframe
SQRR register.
inactive
The S channel data for the next multiframe is writable.
The register for the S bits to be transmitted has to be written within
the next multiframe. This bit is reset by writing register SQXR.
This timing signal is indicated with the start of every multiframe.
Data which is written right after SQW-indication will be transmitted
with the start of the following multiframe. Data which is written
before SQW-indication is transmitted in the multiframe which is
indicated by SQW.
SQW and SQC could be generated at the same time.
H
1
1)
1
read/write
. This bit is reset by a read access to the
169
LD
RIC
Register Description
SQC
Address:
PEF 81902
2001-11-12
SQW
0
39
H

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