pef3460e Infineon Technologies Corporation, pef3460e Datasheet
pef3460e
Manufacturer Part Number
pef3460e
Description
Single Channel T3/e3 Framer & Line Interface For Atm, Frame Relay And Ppp/ip
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF3460E.pdf
(2 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
pef3460eV1.2
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Single channel T3/E3 Framer & Line
Interface for ATM, Frame Relay
and PPP/IP.
The TE3-FALC
broadband interface. It includes DS3/E3 framing,
analog line interface, two jitter attenuators and the
mapping of ATM or PPP/HDLC. The TE3-FALC
integrates a microcontroller which is running the
device driver and gathering statistics as managed
MIB objects.
On the line side the TE3-FALC
co-axial cable via transformers. Highly accurate
analog pulse shaping removes the need to measure
cable length and set the Line Build Out.
On the system side, industry standard UTOPIA and
POS-PHY interface as well as a serial clock/data port
are provided. This allows the TE3-FALC
connected to a wide array of Layer 2/3 & 4 network
processors.
Applications
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Analog Line Interface
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Digital Jitter Attenuator
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T E 3 - F A L C
P E F
w w w . i n f i n e o n . c o m
Wireless base stations
LAN/WAN router
DSLAMs
Remote access/concentrator
Multimedia gateways
Single channel T3/E3 analog
receive & transmit circuitry
Identical T3/E3 transformer inter-
face. True software switchable
Clock & data recovery
Analog LOS detection
Single pulse template for all line
length 0 - 450 ft, no need for
setting of Line Build Out
Two separate transmit and receive
jitter attenuators
Meets jitter transfer requirements
All line rate clocks generated
internally, no requirement for
external 34/45 MHz oscillators
Clock generation unit accepts
flexible frequency reference clocks,
4 MHz to 52 MHz
®
is a complete solution for a T3/E3
3 4 6 0 E
®
interfaces to a 75
DS3/E3 Framer
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ATM Cell Processor
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PPP Processor
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System Interfaces
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®
to be
E3 Framer supporting G.832,
G.751 & TBR24
DS3 framer supporting M23 and
C-Bit parity modes
Processing of all DS3 overhead
channels including the FEAC and
MDL link
Processing of all E3 overhead
channels such as trail trace
PLCP sub frame for DS3/E3 G.751
allowing the mapping of ATM cells
DS3/E3 BERT unit
Cell processor as per G.804
Mapping cells directly into DS3/E3
frames or via PLCP frame
Bit and byte synchronous HDLC
controller
Generation and detection of flags,
bit stuffing, CRC-16/32
Utopia Level 2 interface 8/16 Bit
POS-PHY interface 8/16 Bit
Serial clock and data interface
8/16 Bit Motorola/Intel processor
interface
®
®
also
Ω
N e v e r
TE3-FALC
P
s t o p
R O D U C T
Test and Diagnostic
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Embedded Controller
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General Features
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Key Features
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JTAG test port
OCDS debug port
Embedded microcontroller with
all code & data memory
3.3 V I/O CMOS technology
1.8 V core logic supply
P-BGA-272 package
27 x 27 mm body size,
1.27 mm ball pitch
Industrial temperature range
package, -40 °C to +85 °C
Integrated T3/E3 analog
Single pulse template for all line
lengths, no LBO requirement
Jitter attenuation in both Tx and Rx
Full featured DS3/E3 framer
ATM and PPP/HDLC mapping
UTOPIA or POS-PHY interface
Integrated µC running S/W driver
Control via 8/16 Bit Motorola/Intel
µP i/f or inband ATM/PPP
messages
High level message based API
t h i n k i n g .
B
R I E F
®
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pef3460e Summary of contents
Page 1
Single channel T3/E3 Framer & Line Interface for ATM, Frame Relay and PPP/IP. ® The TE3-FALC is a complete solution for a T3/E3 broadband interface. It includes DS3/E3 framing, analog line interface, two jitter attenuators and the mapping of ATM ...
Page 2
TE3-FALC ® PEF 3460E Block Diagram Bitstream/Overhead Access Interface Tx Line Interface DS3/E3 Framer Analog or Transmit Digital DS3 C-Bit Parity/M23 DJAT E3 G.832/G.751 T3/E3 LIU FDL Insert DS3 FEAC DS3 MDL, E3 TTI Clock PLL Multiplier FDL Extract DS3 ...