sc1452 Semtech Corporation, sc1452 Datasheet - Page 8

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sc1452

Manufacturer Part Number
sc1452
Description
Sc1452 Dual 150 Ma Ldo Regulator With Programmable Reset
Manufacturer
Semtech Corporation
Datasheet
less than 150ms, C
equation above, or read from the chart below.
Component Selection
Output capacitor - Semtech recommends a minimum
capacitance of 1µF at the output with an equivalent
series resistance (ESR) of < 1
SC1452 has been designed to be used with ceramic
capacitors, but does not have to be used with ceramic
capacitors, allowing the designer a choice. Increasing the
bulk capacitance will further reduce output noise and
improve the overall transient response.
Input capacitor - Semtech recommends the use of a 1µF
ceramic capacitor at the input. This allows for the device
being some distance from any bulk capacitance on the
rail. Additionally, input droop due to load transients is
reduced, improving overall load transient response.
Bypass capacitor - Semtech recommends the use of a
10nF ceramic capacitor to bypass the bandgap
reference. Increasing this capacitor to 100nF will
further improve power supply rejection. C
omitted if low noise operation is not required.
Thermal Considerations
The worst-case power dissipation for this part is given
by:
P
POWER MANAGEMENT
Applications Information (Cont.)
D
(
2006 Semtech Corp.
MAX
1000
0.01
100
0.1
10
)
1
0.1
V
V
IN
V
IN
(
IN
MAX
(
MAX
(
MAX
)
)
)
V
I
Q
OUTA
V
1
(
MAX
OUTB
DLYB
(
)
MIN
(
MIN
)
can be calculated using the
)
C
I
DLYB
OUTA
I
OUTB
10
(nF)
(
MAX
(
over temperature. The
MAX
)
)
t
RSTB
100
= 150ms max.
BYP
may be
1000
(1)
8
For all practical purposes, equation (1) can be reduced
to the following expression:
Looking at a typical application:
V
V
V
I
T
Inserting these values into equation (2) above gives us:
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain T
With the standard MSOP-10 Land Pattern shown at the
end of this datasheet, and minimum trace widths, the
thermal impedance junction to ambient for SC1452 is
113°C/W. Thus no additional heatsinking is required for
the above conditions. The junction temperature can be
further reduced by using larger trace widths and
connecting pcb copper area to the GND pin (pin 3), which
connects directly to the device substrate. Lower junction
temperatures improve overall output voltage accuracy.
Layout Considerations
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation.
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
2) Place the input, output and bypass capacitors close
to the device for optimal transient response and device
behaviour.
P
P
OUTA
A
IN(MAX)
OUTA
OUTB
D
D
JA
(
(
= 85°C
MAX
MAX
(
MAX
= I
= 3V - 2% (worst case) = 2.94V
= 3.3V - 2% (worst case) = 3.234V
)
)
)
= 4.2V
OUTB
. 0
. 0
120
V
4
125
T
2 .
189
334
IN
V
= 150mA
( J
. 0
(
IN
MAX
MAX
(
334
C
MAX
W
P
. 2
D
)
)
/
85
. 0
94
(
W
)
MAX
145
T
V
A
OUTA
V
)
(
OUTB
MAX
. 0
15
(
MIN
)
(
MIN
)
)
4
I
2 .
OUTA
I
OUTB
. 3
(
MAX
(
234
MAX
J
)
)
125°C:
. 0
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SC1452
15
(2)

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