ps398 Pericom Semiconductor Corporation, ps398 Datasheet - Page 9

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ps398

Manufacturer Part Number
ps398
Description
Precision 8-ch, Diff. 4-ch, 17v Analog Multiplexers
Manufacturer
Pericom Semiconductor Corporation
Datasheet

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1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Applications
Overvoltage Protection
Proper power-supply sequencing is recommended for all CMOS
devices. Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent damage to
the devices. Always sequence V+ on first, followed by V-, and then
logic inputs. If power-supply sequencing is not possible, add two
small signal diodes or two current limiting resistors in series with
the supply pins for overvoltage protection (Figure 9). Adding
diodes reduces the analog signal range, but low switch resistance
and low leakage characteristics are unaffected.
Maximum Sampling Rate
From the sampling theorem, the sampling frequency needed to
properly recover the original signal should be more than twice
its maximum component frequency. In real applications,
sampling at three or four times the maximum signal frequency is
customary.
The maximum sampling rate of a multiplexer is determined by its
transition time (t
and the settling time (t
put. The maximum sampling rate is:
f
S =
n (t
_______________
TRANS
TRANS
1
+ t
SETTLING
), the number of channels being multiplexed,
SETTLING
) of the sampled signal at the out-
Channel
)
Select
(1)
A0
A2
A1
Figure 8. NO/COM Capacitance
GND
PS398
V+
EN
+5V
-5V
V-
9
Precision 8-Ch, Diff. 4-Ch, 17V Analog Multiplexers
COM
Where n = number of channels scanned: 8 for PS398,
4 for PS399. t
Settling time is the time needed for the output to stabilize within
the desired accuracy band of +1 LSB (least significant bit).
Other factors determining settling time are: signal source imped-
ance, capacitive load at the output. Figure 10 illustrates the steady
state model. To figure out what the settling time due to the multi-
plexer is, we can assume that R
effects of R
ing these calculations.
Figure 9. Overvoltage protection is accomplished using two
N08
N01
external blocking diodes or two current limiting resistors.
V g
S
TRANS
and C
NO
L
Capacitance
is given on the specification table: 150 ns max.
should be taken into account when perform-
Analyzer
f
1MHz
=1MHz
Positive Supply
S
= 0 , and C
V+
V-
L
= 0. In real life, the
PS398/PS399
PS8185F
COM
09/28/04

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