tc74act280 TOSHIBA Semiconductor CORPORATION, tc74act280 Datasheet

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tc74act280

Manufacturer Part Number
tc74act280
Description
9-bit Parity Generator/checker
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
9-Bit Parity Generator/Checker
PARITY GENERATOR fabricated with silicon gate and
double-layer metal wiring C
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
and odd/even parity outputs (Σ ODD and Σ EVEN).
inputs are high. The even parity output is high when an even
number of data inputs are high.
discharge or transient excess voltage.
Features
Pin Assignment
The TC74ACT280 is an advanced high speed CMOS 9-BIT
It achieves the high speed operation similar to equivalent
This device may be used as a level converter for interfacing
The TC74ACT280 is composed of nine data inputs (A thru I)
The odd parity output is high when an odd number of data
The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static
High speed: t
Low power dissipation: I
Compatible with TTL outputs: V
Symmetrical output impedance: |I
Balanced propagation delays: t
Pin and function compatible with 74F280
NC: No connection
TC74ACT280P,TC74ACT280F,TC74ACT280FN
pd
= 9.2 ns (typ.) at V
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
CC
2
MOS technology.
= 8 μA (max) at Ta = 25°C
pLH
V
IL
IH
Capability of driving 50 Ω
transmission lines.
CC
OH
= 0.8 V (max)
∼ − t
= 2.0 V (min)
= 5 V
| = I
pHL
OL
= 24 mA (min)
1
Note:
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
TC74ACT280P
TC74ACT280F
TC74ACT280FN
xxxFN (JEDEC SOP) is not available in
Japan.
TC74ACT280P/F/FN
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
2007-10-01

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tc74act280 Summary of contents

Page 1

... TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. The TC74ACT280 is composed of nine data inputs (A thru I) and odd/even parity outputs (Σ ODD and Σ EVEN). The odd parity output is high when an odd number of data inputs are high ...

Page 2

... IEC Logic Symbol Truth Table Number of Inputs A Through I That are High Σ EVEN Outputs Σ ODD TC74ACT280P/F/FN 2007-10-01 ...

Page 3

... System Diagram TC74ACT280P/F/FN 3 2007-10-01 ...

Page 4

... I IK ± ±50 I OUT ±100 500 (DIP) (Note 2)/180 (SOP) D −65 to 150 T stg Symbol Rating V 4 OUT CC − opr dt/ TC74ACT280P/F/FN Unit °C Unit °C ns/V 2007-10-01 ...

Page 5

... V Per input 5.5 Other input GND CC = 500 Ω, input Test Condition V (V) CC ⎯ 5.0 ± 0.5 ⎯ ⎯ ・ TC74ACT280P/F/ − 25°C 85°C Min Typ. Max Min Max ⎯ ⎯ 2.0 2.0 ⎯ ⎯ ⎯ 0.8 0.8 ⎯ 4.4 4.5 4.4 ⎯ ⎯ 3.94 3.80 ⎯ ...

Page 6

... Package Dimensions Weight: 0.96 g (typ.) TC74ACT280P/F/FN 6 2007-10-01 ...

Page 7

... Package Dimensions Weight: 0.18 g (typ.) TC74ACT280P/F/FN 7 2007-10-01 ...

Page 8

... Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.12 g (typ.) TC74ACT280P/F/FN 8 2007-10-01 ...

Page 9

... Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. TC74ACT280P/F/FN 9 20070701-EN GENERAL 2007-10-01 ...

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