adg3123 Analog Devices, Inc., adg3123 Datasheet
adg3123
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adg3123 Summary of contents
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... DDB for Pin Y1 to Pin Y6 and for Pin Y7 to Pin Y8, respectively. The V pin sets the low output level for all channels. The ADG3123 SS can provide output voltages levels down to −10 V for a low input level and up to +30 V for a high input logic level. For ...
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... ADG3123 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 REVISION HISTORY 5/06—Rev Rev. A Changes to Features, General Description, and Product Highlights ........................................................................... 1 Changes to Specifications ................................................................ 3 Changes to Figure 4 through Figure 9 ........................................... 6 Changes to Figure 14 and Figure 15 ...
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... Figure 2 μ 5 load μA μ ≤ DDB ≤ DDB PHL PLH OUT t F ADG3123 = − − ≤ V DDA DDB t R ...
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... ADG3123 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 2. Parameter Rating DDA DDB GND −0 +32 V DDB V to GND −0 DDA V to GND +0 − Digital Inputs V − 0 mA, whichever occurs first ...
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... Output Y1 to Output Y8. SS pin to generate the output high level for Output Y7 and Output Y8. DDB pin to generate the output high level for Output Y1 to Output Y6 (V DDA Rev Page ADG3123 ≤ DDA DDB ...
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... ADG3123 TYPICAL PERFORMANCE CHARACTERISTICS 4 25° – 5kΩ 100pF L DUTY CYCLE = 50% 3.7 1 CHANNEL 3.5 DDA 3.3 3 DDA 2.9 2.7 2 FREQUENCY (kHz) Figure 4. Supply Current (I ) vs. Frequency DDB 3 25° – 5kΩ 100pF L DUTY CYCLE = 50% 3 ...
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... Figure 13. Propagation Delay ( 0.1 0.01 3.60 4.10 Figure 14. Maximum Operating Frequency vs. Capacitive Load 1000 100 10 1 3.60 4.10 0.01 Figure 15. Maximum Operating Frequency vs. Capacitive Load Rev Page ADG3123 = 25° 27V DDA DDB = – 5kΩ L 0.60 1.10 1.60 2.10 2.60 3.10 3.60 CAPACITIVE LOAD (nF) ) vs. Capacitive Load PHL DDA DDB V = – ...
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... ADG3123 –6 ° 27V DDA DDB V = – CHANNEL –6.6 –6.8 –7 LOAD CURRENT (mA) Figure 16. Output Voltage (V ) vs. Load Current Rev Page 27 ° 27V DDA DDB V = – CHANNEL V = 5.5V 26.9 AX 26.8 26.7 26.6 –15 –10 – ...
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... outputs Negative power supply voltage used to generate the low logic level for outputs. GND Ground (0 V) reference. I DDA Supply current at the V DDA I DDB Supply current at the V DDB I SS Supply current at the V pin. SS Rev Page ADG3123 pin. pin. ...
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... DDX DDA outputs. POWER SUPPLIES The ADG3123 operates from a dual-supply voltage. As good design practice for all CMOS devices dictates, power up the ADG3123 first (V inputs ( and V ADG3123, the voltage applied to the V greater than or equal to V Pin V and Pin V ...
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... The high voltage operation coupled with high current driving capability and the wide range of CMOS levels accepted by the ADG3123, make the device ideal for LCD-TFT panel applica- tions. In this type of application, the controllers that generate the timing signals required to control the pixel scanning process inside the panel are usually low voltage CMOS devices ...
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... ORDERING GUIDE Model Temperature Range 1 ADG3123BRUZ −40°C to +85°C 1 ADG3123BRUZ-REEL −40°C to +85°C 1 ADG3123BRUZ-REEL7 −40°C to +85° Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 6.60 6.50 6. ...