adg5433 Analog Devices, Inc., adg5433 Datasheet - Page 19

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adg5433

Manufacturer Part Number
adg5433
Description
High Voltage Latch-up Proof, Triple/quad Spdt Switches Adg5433/adg5434
Manufacturer
Analog Devices, Inc.
Datasheet

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ADG5433/ADG5434
TRENCH ISOLATION
In the ADG5433/ADG5434, an insulating oxide layer (trench)
NMOS
PMOS
is placed between the NMOS and the PMOS transistors of each
CMOS switch. Parasitic junctions, which occur between the
transistors in junction isolated switches, are eliminated, and the
result is a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
P-WELL
N-WELL
normal operation. However, during overvoltage conditions, this
diode can become forward-biased. A silicon controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current that, in turn, leads to
TRENCH
latch-up. With trench isolation, this diode is removed, and the
BURIED OXIDE LAYER
result is a latch-up proof switch.
HANDLE WAFER
Figure 36. Trench Isolation
Rev. 0 | Page 19 of 24

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