adg1204 Analog Devices, Inc., adg1204 Datasheet

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adg1204

Manufacturer Part Number
adg1204
Description
Low Capacitance, Low Charge Injection, ?15 V/+12 V, 4 1 Icmos? Multiplexer
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
1.5 pF off source capacitance
<1 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V, +12 V
No V
3 V logic-compatible inputs
Rail-to-rail operation
14-lead TSSOP and 12-lead LFCSP_VQ
Typical power consumption < 0.03 μW
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG1204 is a complementary metal-oxide semiconductor
(CMOS) analog multiplexer, comprising four single channels
designed on an iCMOS (industrial CMOS) process. iCMOS is
a modular manufacturing process that combines high voltage
CMOS and bipolar technologies. It enables the development of
a wide range of high performance analog ICs capable of 33 V
operation in a footprint that no previous generation of high
voltage parts has been able to achieve. Unlike analog ICs using
conventional CMOS processes, iCMOS components can tolerate
high supply voltages while providing increased performance,
dramatically lower power consumption, and reduced package size.
The ultralow capacitance and charge injection of this multiplexer
makes it an ideal solution for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth makes
the part suitable for video signal switching. iCMOS construction
ensures ultralow power dissipation, making the part ideally
suited for portable and battery-powered instruments.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
L
supply required
Low Capacitance, Low Charge Injection,
±15 V/+12 V, 4:1 iCMOS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The ADG1204 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines: A0, A1, and
EN. Logic 0 on the EN pin disables the device. Each switch
conducts equally well in both directions when on and has an
input signal range that extends to the supplies. In the off condi-
tion, signal levels up to the supplies are blocked. All switches
exhibit break-before-make switching action.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
1.5 pF off capacitance (±15 V supply).
<1 pC charge injection.
3 V logic-compatible digital inputs: V
No V
Ultralow power dissipation: <0.03 μW.
14-lead TSSOP and 12-lead, 3 mm × 3 mm LFCSP_VQ
packages.
L
logic power supply required.
FUNCTIONAL BLOCK DIAGRAM
S2
S1
S3
S4
©2006 Analog Devices, Inc. All rights reserved.
A0
ADG1204
DECODER
Figure 1.
1 OF 4
A1
EN
Multiplexer
IH
ADG1204
D
= 2.0 V, V
www.analog.com
IL
= 0.8 V.

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adg1204 Summary of contents

Page 1

... Low Capacitance, Low Charge Injection, ±15 V/+12 V, 4:1 iCMOS FUNCTIONAL BLOCK DIAGRAM The ADG1204 switches one of four inputs to a common output determined by the 3-bit binary address lines: A0, A1, and EN. Logic 0 on the EN pin disables the device. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies ...

Page 2

... ADG1204 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Specifications..................................................................................... 3 Dual Supply ................................................................................... 3 Single Supply ................................................................................. 5 Absolute Maximum Ratings............................................................ 7 REVISION HISTORY 7/06—Rev Rev. A Updated Format..................................................................Universal Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 5 Changes to the Terminology Section........................................... 14 7/05—Revision 0: Initial Version ESD Caution ...

Page 3

... Figure 31 MHz typ Ω pF; see Figure typ MHz max MHz typ MHz max MHz typ MHz max MHz ADG1204 ...

Page 4

... ADG1204 Parameter POWER REQUIREMENTS version temperature range is −40°C to +125°C. 2 Guaranteed by design, not subject to production test Version −40°C to −40°C to 25°C +85°C +125°C 0.001 1.0 170 250 0.001 1.0 0.001 1.0 Rev Page ...

Page 5

... Rev Page ADG1204 Unit Test Conditions/Comments V Ω typ −1 mA see Figure 21 Ω max Ω typ − Ω ...

Page 6

... ADG1204 Parameter POWER REQUIREMENTS version temperature range is −40°C to +125°C. 2 Guaranteed by design, not subject to production test Version −40°C to −40°C to 25°C +85°C +125°C 0.001 1.0 170 250 Rev Page Unit Test Conditions/Comments μ ...

Page 7

... Exposure to absolute + 0 maximum rating conditions for extended periods may affect DD device reliability Only one absolute maximum rating can be applied at any one time. Rev Page ADG1204 ...

Page 8

... Off Off 0 Off 1 Off Rev Page PIN 1 INDICATOR ADG1204 S1 2 TOP VIEW S2 3 (Not to Scale CONNECT NOTES 1. EXPOSED PAD TIED TO SUBSTRATE, V Figure 3. LFCSP_VQ Pin Configuration S2 S3 Off Off Off Off On Off Off On Off Off ...

Page 9

... –16. +10V/–10V BIAS 0.20 0.15 0.10 I (OFF) S 0.05 0 –0.05 –0. TEMPERATURE (°C) Figure 9. Leakage Currents as a Function of Temperature, Dual Supply ADG1204 V = +15V –15V SS = +25° for Different S = +125°C = +25° for Different (ON) ...

Page 10

... ADG1204 0. 13. 0. 10V/1V BIAS 0.10 0.05 0 –0.05 –0.10 –0.15 –0. TEMPERATURE (°C) Figure 10. Leakage Currents as a Function of Temperature, Single Supply +12V LOGIC, IN Figure 11. I vs. Logic Level DD 6 SOURCE TO DRAIN DRAIN TO SOURCE T = +25° ...

Page 11

... Figure 20. Capacitance vs. Source Voltage, Single Supply Rev Page ADG1204 V = +15V –15V +25° –8 –6 –4 – (V) BIAS Figure 19. On Capacitance vs. Source Voltage V = 12V ...

Page 12

... ADG1204 TEST CIRCUITS Figure 21. On Resistance 0.1µ 2. 0.1µ 50Ω 2.4V EN GND V DD 0.1µ GND V S 50Ω I (OFF Figure 22. Off Leakage 0.1µF ADDRESS V V DRIVE (V DD ...

Page 13

... V OUT 50Ω OUT L V OUT CHANNEL-TO-CHANNEL CROSSTALK = 20 log V S 0.1µF 50Ω OUT WITH SWITCH Rev Page ADG1204 ΔV OUT × ΔV INJ L OUT SW OFF OFF 0.1µ 50Ω ...

Page 14

... ADG1204 TERMINOLOGY I DD The positive supply current The negative supply current The analog voltage on Terminal D and Terminal The ohmic resistance between D and S. R FLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range ...

Page 15

... MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range ADG1204YRUZ 1 −40°C to +125°C 1 ADG1204YRUZ-REEL −40°C to +125°C 1 ADG1204YRUZ-REEL7 −40°C to +125°C 1 ADG1204YCPZ-500RL7 −40°C to +125°C 1 ADG1204YCPZ-REEL7 −40°C to +125° Pb-free part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 0.65 BSC 0.20 1.20 0.09 MAX 0 ...

Page 16

... ADG1204 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04779-0-7/06(A) Rev Page ...

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