adg752 Analog Devices, Inc., adg752 Datasheet - Page 4

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adg752

Manufacturer Part Number
adg752
Description
Cmos, Low Voltage Rf/video, Spdt Switch
Manufacturer
Analog Devices, Inc.
Datasheet

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ADG752
ABSOLUTE MAXIMUM RATINGS
(T
V
Analog, Digital Inputs
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Storage Temperature Range . . . . . . . . . . . . . –65 C to +150 C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . (T
Junction Temperature (T
SOT-23 Package
Lead Temperature, Soldering
NOTES
1
2
Model
ADG752BRM
ADG752BRT
*Brand on these packages is limited to three characters due to space constraints.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG752 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
SOIC Package
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
limited to the maximum ratings given.
DD
A
Industrial (B Version) . . . . . . . . . . . . . . . . . –40 C to +85 C
θ
θ
θ
θ
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+215 C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220 C
JA
JC
JA
JC
= +25 C unless otherwise noted)
GND
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
NC
S2
ADG752 IN
0
1
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206 C/W
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6 C/W
IN
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44 C/W
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99 C/W
8-Lead SOIC
NC = NO CONNECT
1
2
3
4
(Not to Scale)
TOP VIEW
(RM-8)
ADG752
PIN CONFIGURATIONS
Table I. Truth Table
8
7
6
5
2
D
V
S1
NC
DD
. . . . . . . . . . . . –0.3 V to V
(Pulsed at 1 ms, 10% Duty Cycle Max)
J
Switch S1
ON
OFF
Max) . . . . . . . . . . . . . . . . . .+150 C
Temperature Range
–40 C to +85 C
–40 C to +85 C
30 mA, Whichever Occurs First
V
DD
S1
1
D
6-Lead SOT-23
1
2
3
(Not to Scale)
TOP VIEW
ADG752
(RT-6)
Switch S2
OFF
ON
J
Max–T
DD
6
5
4
+0.3 V or
S2
GND
IN
ORDERING GUIDE
A
Brand*
SEB
SEB
)/θ
JA
–4–
TERMINOLOGY
V
GND
S
D
IN
R
∆R
R
I
I
V
C
C
t
t
t
Off Isolation
Crosstalk
Bandwidth
On Response
Insertion Loss
V
V
I
I
S
D
ON
OFF
D
INL
DD
DD
ON
FLAT(ON)
D
INL
INH
S
D
, I
(OFF)
ON
, C
(OFF)
(V
(I
S
INH
(ON)
S
S
)
(ON)
)
Package Descriptions
SOT-23
SOIC
The frequency at which the output is attenu-
Most positive power supply potential.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
On resistance match between channels, i.e.,
R
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
Source leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D and S.
“OFF” switch source capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
Delay between applying the digital control
input and the output switching off.
“OFF” time or “ON” time measured between
the 90% points of both switches, when switch-
ing from one address state to another.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
ated by –3 dBs.
The frequency response of the “ON” switch.
Loss due to the ON resistance of the switch.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
Positive supply current.
ON
max–R
ON
min.
WARNING!
Package Options
RM-8
RT-6
ESD SENSITIVE DEVICE
REV. 0

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