adg786bcp-reel7 Analog Devices, Inc., adg786bcp-reel7 Datasheet - Page 6

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adg786bcp-reel7

Manufacturer Part Number
adg786bcp-reel7
Description
2.5 , 1.8 V To 5.5 V, 2.5 V Triple/quad Spdt Switches In Chip Scale Packages
Manufacturer
Analog Devices, Inc.
Datasheet
ADG786/ADG788
A2
X
0
0
0
0
1
1
1
1
V
V
I
I
GND
S
D
IN
V
R
R
I
I
V
V
I
C
C
C
t
t
t
t
t
Charge
Off Isolation
Crosstalk
On Response
Insertion Loss
DD
SS
S
D
INL
ON
OFF
ON
OFF
OPEN
R
DD
SS
D
ON
FLAT(ON)
INL
INH
S
D
IN
, I
(OFF)
ON
, C
(OFF)
(EN)
(V
(I
(EN)
S
INH
(ON)
S
S
)
(ON)
A1
X
0
0
1
1
0
0
1
1
)
Table I. ADG786 Truth Table
A0
X
0
1
0
1
0
1
0
1
Most Positive Power Supply Potential
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to
ground close to the device.
Positive Supply Current
Negative Supply Current
Ground (0 V) Reference
Source Terminal. May be an input or output
Drain Terminal. May be an input or output
Logic Control Input
Analog Voltage on Terminals D, S
Ohmic Resistance between D and S
On Resistance Match between Any Two Channels, i.e., R
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured
over the specified analog signal range.
Source Leakage Current with the Switch “OFF”
Channel Leakage Current with the Switch “ON”
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Input Current of the Digital Input
“OFF” Switch Source Capacitance. Measured with reference to ground.
“ON” Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance
Delay time measured between the 50% and 90% points of the digital inputs and the switch “ON” condition.
Delay time measured between the 50% and 90% points of the digital input and the switch “OFF” condition.
Delay time between the 50% and 90% points of the EN digital input and the switch “ON” condition.
Delay time between the 50% and 90% points of the EN digital input and the switch “OFF” condition.
“OFF” time measured between the 80% points of both switches when switching from one address state to another.
A measure of the glitch impulse transferred Injection from the digital input to the analog output during switching.
A measure of unwanted signal coupling through an “OFF” switch.
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance.
The Frequency Response of the “ON” Switch
The Loss Due to the ON Resistance of the Switch.
EN
1
0
0
0
0
0
0
0
0
ON Switch
None
D1-S1A, D2-S2A, D3-S3A
D1-S1B, D2-S2A, D3-S3A
D1-S1A, D2-S2B, D3-S3A
D1-S1B, D2-S2B, D3-S3A
D1-S1A, D2-S2A, D3-S3B
D1-S1B, D2-S2A, D3-S3B
D1-S1A, D2-S2B, D3-S3B
D1-S1B, D2-S2B, D3-S3B
TERMINOLOGY
ON
max – R
Logic
0
1
Table II. ADG788 Truth Table
ON
min.
Switch A
OFF
ON
Switch B
ON
OFF

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