lm4140ccmx-4.1 National Semiconductor Corporation, lm4140ccmx-4.1 Datasheet - Page 10
![no-image](/images/no-image-200.jpg)
lm4140ccmx-4.1
Manufacturer Part Number
lm4140ccmx-4.1
Description
High Precision Low Noise Low Dropout Voltage
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM4140CCMX-4.1.pdf
(15 pages)
www.national.com
Application Hints
MULTILAYER CERAMIC CAPACITORS
Surface-mountable multilayer ceramic capacitors may be an
attractive choice because of their relatively small physical
size and excellent RF characteristics.
However, they sometimes have an ESR values lower than
the minimum required by the LM4140, and relatively large
capacitance change with temperature. The manufacturer’s
datasheet for the capacitor should be consulted before se-
lecting a value. Test results of LM4140 stability using multi-
layer ceramic capacitors show that a minimum of 0.2µF is
usually needed.
Multilayer ceramic capacitors that have been verified as
suitable for use with the LM4140 are shown in Table 2.
REVERSE CURRENT PATH
The P-channel Pass transistor used in the LM4140 has an
inherent diode connected between the V
(see diagram below).
Forcing the output to voltages higher than the input, or
pulling V
more than a V
flow from the V
LM4140 will occur under these conditions as long as the
current flowing into the output pin does not exceed 50mA.
ON/OFF OPERATION
The LM4140 is designed to quickly reduce both V
to zero when turned-off. V
when turned-on. During the turn-off, the charge across the
output capacitor is discharged to ground through internal
circuitry.
The LM4140 is turned-off by pulling the enable input low, and
turned-on by driving the input high. If this feature is not to be
used, the enable pin should be tied to the V
reference on at all times (the enable pin must not be left
floating).
To ensure proper operation, the signal source used to drive
the enable pin must be able to swing above and below the
specified high and low voltage thresholds which guarantee
an ON or OFF state (see Electrical Characteristics).
The ON/OFF signal may come from either a totem-pole
output, or an open-collector output with pull-up resistor to the
LM4140 input voltage. This high-level voltage may exceed
TABLE 2. Surface-Mount Ceramic Capacitors Selection
Manufacturer
IN
below voltage stored on the output capacitor by
Murata
Tokin
Tokin
2.2µF Surface-Mount Ceramic
4.7µF Surface-Mount Ceramic
be
, will forward bias this diode and current will
REF
terminal to V
REF
Guide
is restored in less than 200µs
(Continued)
GRM42-6Y5V225Z16
1E225ZY5U-C203
1E475ZY5U-C304
10107903
IN
Part Number
. No damage to the
IN
and V
IN
to keep the
REF
REF
and I
pins
Q
10
the LM4140 input voltage, but must remain within the Abso-
lute Maximum Rating for the enable pin.
OUTPUT ACCURACY
Like all references, either series or shunt, the after assembly
accuracy is made up of primarily three components: initial
accuracy itself, thermal hysteresis and effects of the PCB
assembly stress.
LM4140 provides an excellent output initial accuracy of 0.1%
and temperature coefficient of 6ppm/˚C (B Grade).
For best accuracy and precision, the LM4140 junction tem-
perature should not exceed 70˚C.
The thermal hysteresis curve on this datasheet are perfor-
mance characteristics of three typical parts selected at ran-
dom from a sample of 40 parts.
Parts are mounted in a socket to minimize the effect of
PCB’s mechnical expansion and contraction. Readings are
taken at 25˚C following multiple temperature cycles to 0˚C
and 70˚C. The labels on the X axis of the graph indicates the
device temperature cycle prior to measurement at 25˚C.
The mechanical stress due to the PCB’s mechanical and
thermal stress can cause an output voltage shift more than
the true thermal coefficient of the device. References in
surface mount packages are more susceptible to these
stresses because of the small amount of plastic molding
which support the leads.
Following the recommendations on PCB Layout Consider-
ation section can minimize the mechanical stress on the
device.
PCB LAYOUT CONSIDERATION
The simplest ways to reduce the stress related shifts are:
1. Mounting the device near the edges or the corners of the
2. Mechanical isolation of the device by creating an island
Figure 5 is a recommended printed board layout with a slot
cut on three sides of the circuit layout to serve as a strain
relief.
board where mechanical stress is at its minimum. The
center of the board generally has the highest mechani-
cal and thermal expansion stress.
by cutting a U shape slot on the PCB for mounting the
device. This approach would also provide some thermal
isolation from the rest of the circuit.
FIGURE 4. Typical Thermal Hysteresis
10107933