w83977f Winbond Electronics Corp America, w83977f Datasheet - Page 77

• Manufacturer Part Number: w83977f
• Description: Plug & Play 1.0a Compliant
• Manufacturer: Winbond Electronics Corp America

4.5.3 Reg2 - Mapped IR FIFO Control Register (MP_UFR)
This register is read only. Reading this register returns IR FIFO Control Register (UFR) value of SET
0.
4.5.4 Reg3 - Sets Select Register (SSR)
Reading this register returns E4H. Writing a value selects a Register Set.
4.6 Set4 - TX/RX/Timer counter registers and IR control registers.
4.6.1 Set4.Reg0, 1 - Timer Value Register (TMRL/TMRH)
This is a 12-bit timer whose resolution is 1ms, that is, the maximum programmable time is 2
The timer is a down-counter and starts counting down when EN_TMR (Enable Timer) of Set4.Reg2 is
set to 1. When the timer counts down to zero and EN_TMR=1, the TMR_I is set to 1 and a new initial
value will be loaded into counter.
4.6.2 Set4.Reg2 - Infrared Mode Select (IR_MSL)
Bit 7~4: Reserved, write to 0.
Bit 3, 2: IR_MSL1, 0 - Infrared Mode Select
Advanced IR
Default Value
Default Value
Address Offset Register Name
Reset Value
Reg.
Reg.
SSR
SSR
Mode
0
1
2
3
4
5
6
7
Select legacy IR, SIR, or ASK-IR mode. Note that in legacy SIR/ASK-IR user should set
DIS_BACK=1 to avoid backward when programming baud rate.
SSR7
SSR7
Bit 7
Bit 7
Bit 7
0
1
0
-
IR_MSL1, 0
IR_MSL
RFRLH
TFRLH
RFRLL
Bit 6
TFRLL
TMRH
TMRL
00
01
10
11
SSR
0
-
SSR6
SSR6
Bit 6
Bit 6
0
1
Bit 5
0
-
SSR5
SSR5
Bit 5
Bit 5
Timer Value Low Byte
Timer Value High Byte
Infrared Mode Select
Sets Select Register
Transmitter Frame Length Low Byte
Transmitter Frame Length High Byte
Receiver Frame Length Low Byte
Receiver Frame Length High Byte
Bit 4
0
1
0
-
- 65 -
IR_MSL1
SSR4
SSR4
Bit 4
Bit 4
Bit 3
0
0
Operation Mode Selected
0
Legacy ASK-IR
Register Description
W83977F/ W83977AF
Legacy SIR
SSR3
SSR3
Legacy IR
Bit 3
Bit 3
0
0
Publication Release Date: March 1998
IR_MSL0
CIR
Bit 2
0
SSR2
SSR2
Bit 2
Bit 2
0
1
TMR_TST
Bit 1
PRELIMINARY
0
SRR1
SRR1
Bit 1
Bit 1
0
0
Revision 0.58
EN_TMR
Bit 0
12
SRR0
SRR0
Bit 0
Bit 0
0
-1 ms.
0
0