lm2501sl National Semiconductor Corporation, lm2501sl Datasheet - Page 13

• Manufacturer Part Number: lm2501sl
• Description: Mobile Pixel Link Mpl Camera Interface Serializer And Deserializer
• Manufacturer: National Semiconductor Corporation

Features and Operation
When the Deserializer’s PD* signal is de-asserted, the WC
output will power up and initialize the serializer and start
transmitting the clock reference. Once the Serializer re-
ceived the clock, it waits seven cycles, and then outputs the
MISC. Definitions:
Bus States:
Logic Low — 5Idata flowing from the Receiver to the
Logic High — Idata flowing from the Receiver to the Driver
Power Off — No Current flowing in the interconnect
Driver
(Continued)
FIGURE 11. Active to Sleep
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clock signal. Seven cycles later, the Serializer’s PLL will
begin to lock if PCLK is present.
When the Deserializer’s PD* signal is asserted, the WC
signal is turned off.
Signals & Nomenclature:
MD = MPL Data Signal, subscript denotes source, m =
MC = MPL Clock Signal
WC = MPL WhisperClock Signal
* =
master, s = slave
Active Low Signal
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20091609