aduc814aru-reel7 Analog Devices, Inc., aduc814aru-reel7 Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
aduc814aru-reel7
Manufacturer Part Number
aduc814aru-reel7
Description
Microconverter, Small Package 12-bit Adc With Embedded Flash Mcu
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC814ARU-REEL7.pdf
(72 pages)
- Current page: 7 of 72
- Download datasheet (847Kb)
Parameter
FLASH/EE MEMORY RELIABILITY
CHARACTERISTICS
POWER REQUIREMENTS
After External RESET in Normal Mode
After WDT Reset in Normal Mode
Endurance
Data Retention
Power Supply Voltages
Power Supply Currents, Normal Mode
Power Supply Currents, Idle Mode
Power Supply Currents, Power-Down
Mode
Typical Additional Power Supply
Currents
Oscillator Powered Down
AV
D
A
D
A
D
A
D
AV
DV
AV
DV
AV
DV
AV
DV
AV
PSM Peripheral
ADC
DAC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Wake-Up with INT0 Interrupt
Wake-Up with SPI/I
Wake-Up with External RESET
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
/DV
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
18
DD
– AGND
14
14
14
14
19
14
14
14
14
14
14
17
20, 21
2
C Interrupt
16
V
150
150
150
3
3
100,000
100
4.5
5.5
5
4
1.7
20
16
1.7
3.5
2.8
1.7
1.7
1.5
0.15
6
4
0.15
1.25
1.1
0.15
40
1
20
1
50
1.5
150
DD
= 5 V
V
400
400
400
3
3
100,000
100
2.7
3.3
2.5
2
1.7
10
8
1.7
1.5
1.2
1.7
1.2
1
0.15
3
2.5
0.15
1
0.7
0.15
20
14
1
15
10
1
DD
Rev. A | Page 7 of 72
= 3 V
Unit
ms typ
ms typ
ms typ
ms typ
ms typ
Cycles min
Years min
V min
V max
V min
V max
mA max
mA typ
mA max
mA max
mA typ
mA max
mA max
mA typ
mA max
mA max
mA typ
mA max
mA max
mA typ
mA max
mA max
mA typ
mA max
µA max
µA typ
µA typ
µA max
µA typ
µA typ
µA typ
mA typ
µA typ
Test Conditions
OSC_PD = 1 in PLLCON SFR
Controlled via WDCON SFR
AV
AV
Core CLK = 2.097 MHz
(CD bits in PLLCON = 3)
Core CLK = 16.78MHz (max)
(CD bits in PLLCON = 0)
Core CLK = 131.2 kHz (min)
(CD bits in PLLCON = 7)
Core CLK = 2.097 MHz
(CD Bits in PLLCON = 3)
Core CLK = 16.78 MHz (max)
(CD bits in PLLCON = 0)
Core CLK = 131 kHz (min)
(CD bits in PLLCON = 7)
Core CLK = 2.097 MHz or 16.78 MHz (CD bits in
PLLCON = 3 or 0)
Oscillator on
Oscillator off
Core CLK = 2.097 MHz, (CD bits in PLLCON = 3)
AV
DD
DD
DD
/DV
/DV
= DV
DD
DD
DD
= 3 V nom
= 5 V nom
= 5 V
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