lm9040 National Semiconductor Corporation, lm9040 Datasheet - Page 6

• Manufacturer Part Number: lm9040
• Description: Dual Lambda Sensor Interface Amplifier
• Manufacturer: National Semiconductor Corporation

www.national.com
Differential Input Circuit
In effect, the result is the same as forcing a bias current
through the Differential Input Impedance.
The bias current is defined as:
The Differential Input Impedance is defined as:
This bias voltage will be developed across the Differential
Input Impedance (Z
from the non-inverting input pin for I
input has a current path to ground. See Figure 5 . During
normal operating conditions I
on accuracy.
Differential Input Filtering
Since each input is sampled independently, an anti-aliasing
filter is required at the amplifier inputs to ensure that the
input signal does not exceed the Nyquist frequency.
This external low-pass filter is implemented by adding a
capacitor (C
This forms an RC network across the differential inputs in
conjunction with the required external 4 k resistors and the
differential input impedance (Z
should be small enough to have minimal effect on gain
accuracy in the application, yet large enough to filter out
unwanted noise. Given that the F
500 Hz, the use of a 0.01 µF capacitor will generally provide
adequate filtering, with less than −0.4 dB of input attenuation
at 500 Hz and approximately −28 dB at 50 kHz. A larger
value capacitor can be used if needed, but a value larger
than typically 0.02 µF will begin to dominate the cut-off
frequency of the application. This capacitor must be a low
leakage and low ESR type so that circuit performance is not
degraded.
FIGURE 5. Equivalent Input Bias Circuit
DIFF
) across the differential input. See Figure 6 .
DIFF
) if there is no other path available
BIAS
DIFF
C
will have a negligible effect
). The capacitor selected
of the LM9040 is typically
BIAS
, and the inverting
(Continued)
01237215
6
Common Mode Filtering
The differential input sampling of the LM9040 actually re-
duces the effects of common mode input noise at low fre-
quencies. The time interval between the sampling of the
inverting input and the non-inverting input is one half of a
clock period. A change in the common mode voltage during
this short time interval can cause an error in the charge
stored on C
voltage. For a sine-wave common mode voltage the mini-
mum common mode rejection is:
Where F
and F
For a common mode sine wave signal having a frequency
100 Hz, and with a F
mon mode rejection would be:
If the common mode sine wave has a peak to peak value of
2V, the maximum voltage error at the output would be:
As this formula shows, the value of V
to the frequency of the CMR signal. If the frequency is
doubled, the value of V
of a small bypass capacitor (C
input to ground will help counter this problem. See Figure 6 .
However, the use of this bypass capacitor creates a new
problem in that the differential input is no longer balanced.
While the Lambda sensor is cold (i.e. R
there is little difference in CMR performance. As the Lambda
sensor heats to the operating temperature and the sensor
resistance decreases, the common mode signal is no longer
applied to both inputs equally. This imbalance causes
V
non-inverting input will see the full common mode signal,
while the non-inverting input will see an attenuated common
mode signal.
The selection of the value of the CMR bypass capacitor
needs to be balanced with the need for reasonable reduc-
tion, or elimination, of common mode signals with both cold
and hot sensors. Since normal operation will need to include
consideration of the entire impedance range of the sensor, a
trade off in overall application performance may be needed.
Generally, the value of the CMR bypass capacitor should be
kept as low as possible, and should not be larger than the
differential input filter capacitor. Values in the range of
0.001 µF to 0.01 µF will usually provide reasonable CMR
results, but optimum results will need to be determined
empirically, as the source of common mode signals will be
unique to each application.
OUT(CM)
FIGURE 6. Differential and Common Mode Filtering
CLOCK
CMRR = 2 •
CMR
CMRR = 2 • 3.14159 • 100 • 5E-6 • 4.53
to increase as R
IN
is the clock frequency.
V
. This will result in an error seen on the output
is the frequency of the common mode signal,
OUT(CM)
CMRR = 0.014 = −37 dB
CLOCK
OUT(CM)
• F
= 2V • 0.014 = 28 mV
CMR
of 100 kHz, the minimum com-
SENSOR
• (0.5/F
is also doubled. The addition
CM
) from the non-inverting
OUT(CM)
CLOCK
SENSOR
decreases, as the
) • 4.53
is proportional
>
10 Meg )
01237216