bd9202efs ROHM Co. Ltd., bd9202efs Datasheet - Page 14

• Manufacturer Part Number: bd9202efs
• Description: White Backlight Led Drivers For Medium To Large Lcd Panels Swreg Type
• Manufacturer: ROHM Co. Ltd.

●Electricity Consumption Calculations
＜Sample calculation＞
●PCB Board Circuit Diagram
○ The CVCC and CREG decoupling condensers should be placed as close as possible to the IC pin.
○ Because high current can flow through CSGND and PGND1~4, they should all be wired independently with low impedance.
○ Do not apply noise to 17-pin ISET, 18-pinVSET, 27-pin BRT, 28-pin RT and 39-pin COMP.
○ 1-pin LED, 3-pin LED2, 20-pin LED3, 22-pin LED4, 23-pin LED5, 25-pin LED6, 31-pin SWOUT, 35-pin CT_CYNC_OUT,
○ The thick-lined areas should be laid out as short as possible with broad pattern.
○ During normal use, the jumper configurations are J1～J4=Short and J5=open.
© 2009 ROHM Co., Ltd. All rights reserved.
BD9202EFS
www.rohm.com
Because this IC has a built-in driver circuit, there is a considerable amount of heat generated. Careful consideration is
necessary for substrate and heat dissipation design.
CPUVDD
Pc(N)=ICC*VCC+2*Ciss*VREG*Fsw*Vcc*[VLED*N+ΔVf*(N-1)]*ILED
ICC
VCC
Ciss
Vsw
Fsw
Rload
Iload
VLED
N
ΔVf
ILED
36-pin BCT_SYNC_OUT, 42-pin LED7 and 44-pin LED8 switch, so make sure they do not affect the surrounding pattern.
RFL1=5.1kΩ
RFL2=5.1kΩ
When Pc(8)=21mA×30V+500pF×5V×600kHz×30V+[0.95V×8+ΔVf×7] ×75mA
ΔVf=1.2V (about 0.1V each),
Pc(8)=0.63W+0.045W+1.2W
CREG=2.2uF
RSET=68kΩ
CP1=27pF
CP2=27pF
J5
=1.875W
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
：Maximum circuit current
：Power voltage
：External FET capacity
：SW gate voltage
：SW frequency
：LOAD SW ON resistance
：LOAD SW maximum inflowing current
：LED control voltage
：LED parallel numeric
：LED Vf variance
：LED output current
CPUDO
LED1
PGND2
LED2
CP1
CP2
FAIL1
FAIL2
AGND
CPUDI
CPUVDD
CPUCLK
CPUCS
VCC
VREG
VREF
ISET
VSET
TEST
LED3
PGND3
LED4
BCT_SYNC_OUT
CT_SYNC_OUT
BCT_SYNC_IN
CT_SYNC_IN
LOSDSW
SWOUT
PGND5
TOUT2
PGND1
TOUT1
PGND4
COMP
UVLO
LED8
LED7
LED6
LED5
OVP
BRT
EN
CS
RT
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
VCC
CVCC=10uF
RPC=300Ω
RBCT=51kΩ
RCT=51kΩ
14
CPC＝1uF
RVCC＝300Ω
CLPF
=1000pF
=5.1kΩ
RVULO1
＝91kΩ
RUVLO2
RLD2
=10kΩ
RLPF=100Ω
=5.1kΩ
RLD1
CLD
CSGND
Q2
14/19
Q1
L1
RCS=51mΩ
47uH
CVOUT
=220uF
RESR
D1
ROVP1=
560kΩ
ROVP2
=20kΩ
LED8 44
LED7 42
LED6 25
LED5 23
LED3 20
LED4 22
LED2 3
LED1 1
RE-H42TD-1130
1
2
3
4
10
11
12
1
2
3
4
5
6
7
8
9
12FDZ-BT
GND
VREF
VSET
BCT_SYNC_IN
BCT_SYNC_OUT 36
CT_SYNC_IN
CT_SYNC_OUT
CPUVDD 11
CPUDCLK 12
CPUDO
CPUCS
PGND1
CPUDI
EN
16
18
J4
J3
41
13
32
10
37
9
38
35
J2
J1
Technical Note
2009.04 - Rev.A
CT_SYNC_IN
BCT_SYNC_IN
08FDZ-ST (1)
08FDZ-ST (2)
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
37
38